1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * vectors - Generic ARM exception table code
5 * Copyright (c) 1998 Dan Malek <dmalek@jlc.net>
6 * Copyright (c) 1999 Magnus Damm <kieraypc01.p.y.kie.era.ericsson.se>
7 * Copyright (c) 2000 Wolfgang Denk <wd@denx.de>
8 * Copyright (c) 2001 Alex Züpke <azu@sysgo.de>
9 * Copyright (c) 2001 Marius Gröger <mag@sysgo.de>
10 * Copyright (c) 2002 Alex Züpke <azu@sysgo.de>
11 * Copyright (c) 2002 Gary Jennejohn <garyj@denx.de>
12 * Copyright (c) 2002 Kyle Harris <kharris@nexus-tech.net>
18 * A macro to allow insertion of an ARM exception vector either
19 * for the non-boot0 case or by a boot0-header.
23 ldr pc, _undefined_instruction
24 ldr pc, _software_interrupt
25 ldr pc, _prefetch_abort
34 *************************************************************************
36 * Symbol _start is referenced elsewhere, so make it global
38 *************************************************************************
44 *************************************************************************
46 * Vectors have their own section so linker script can map them easily
48 *************************************************************************
51 .section ".vectors", "ax"
53 #if defined(CONFIG_ENABLE_ARM_SOC_BOOT0_HOOK)
55 * Various SoCs need something special and SoC-specific up front in
56 * order to boot, allow them to set that in their boot0.h file and then
59 * To allow a boot0 hook to insert a 'special' sequence after the vector
60 * table (e.g. for the socfpga), the presence of a boot0 hook supresses
61 * the below vector table and assumes that the vector table is filled in
62 * by the boot0 hook. The requirements for a boot0 hook thus are:
63 * (1) defines '_start:' as appropriate
64 * (2) inserts the vector table using ARM_VECTORS as appropriate
66 #include <asm/arch/boot0.h>
71 *************************************************************************
73 * Exception vectors as described in ARM reference manuals
75 * Uses indirect branch to allow reaching handlers anywhere in memory.
77 *************************************************************************
81 #ifdef CONFIG_SYS_DV_NOR_BOOT_CFG
82 .word CONFIG_SYS_DV_NOR_BOOT_CFG
85 #endif /* !defined(CONFIG_ENABLE_ARM_SOC_BOOT0_HOOK) */
88 *************************************************************************
90 * Indirect vectors table
92 * Symbols referenced here must be defined somewhere else
94 *************************************************************************
97 .globl _undefined_instruction
98 .globl _software_interrupt
99 .globl _prefetch_abort
105 _undefined_instruction: .word undefined_instruction
106 _software_interrupt: .word software_interrupt
107 _prefetch_abort: .word prefetch_abort
108 _data_abort: .word data_abort
109 _not_used: .word not_used
113 .balignl 16,0xdeadbeef
116 *************************************************************************
120 *************************************************************************
123 /* SPL interrupt handling: just hang */
125 #ifdef CONFIG_SPL_BUILD
128 undefined_instruction:
136 b 1b /* hang and never return */
138 #else /* !CONFIG_SPL_BUILD */
140 /* IRQ stack memory (calculated at run-time) + 8 bytes */
141 .globl IRQ_STACK_START_IN
143 #ifdef IRAM_BASE_ADDR
144 .word IRAM_BASE_ADDR + 0x20
152 #define S_FRAME_SIZE 72
174 #define MODE_SVC 0x13
178 * use bad_save_user_regs for abort/prefetch/undef/swi ...
179 * use irq_save_user_regs / irq_restore_user_regs for IRQ/FIQ handling
182 .macro bad_save_user_regs
183 @ carve out a frame on current user stack
184 sub sp, sp, #S_FRAME_SIZE
185 stmia sp, {r0 - r12} @ Save user registers (now in svc mode) r0-r12
186 ldr r2, IRQ_STACK_START_IN
187 @ get values for "aborted" pc and cpsr (into parm regs)
189 add r0, sp, #S_FRAME_SIZE @ grab pointer to old stack
192 stmia r5, {r0 - r3} @ save sp_SVC, lr_SVC, pc, cpsr
193 mov r0, sp @ save current stack into r0 (param register)
196 .macro irq_save_user_regs
197 sub sp, sp, #S_FRAME_SIZE
198 stmia sp, {r0 - r12} @ Calling r0-r12
199 @ !!!! R8 NEEDS to be saved !!!! a reserved stack spot would be good.
201 stmdb r8, {sp, lr}^ @ Calling SP, LR
202 str lr, [r8, #0] @ Save calling PC
204 str r6, [r8, #4] @ Save CPSR
205 str r0, [r8, #8] @ Save OLD_R0
209 .macro irq_restore_user_regs
210 ldmia sp, {r0 - lr}^ @ Calling r0 - lr
212 ldr lr, [sp, #S_PC] @ Get PC
213 add sp, sp, #S_FRAME_SIZE
214 subs pc, lr, #4 @ return & move spsr_svc into cpsr
218 ldr r13, IRQ_STACK_START_IN @ setup our mode stack
220 str lr, [r13] @ save caller lr in position 0 of saved stack
221 mrs lr, spsr @ get the spsr
222 str lr, [r13, #4] @ save spsr in position 1 of saved stack
223 mov r13, #MODE_SVC @ prepare SVC-Mode
225 msr spsr, r13 @ switch modes, make sure moves will execute
226 mov lr, pc @ capture return pc
227 movs pc, lr @ jump to next instruction & switch modes.
230 .macro get_irq_stack @ setup IRQ stack
231 ldr sp, IRQ_STACK_START
234 .macro get_fiq_stack @ setup FIQ stack
235 ldr sp, FIQ_STACK_START
243 undefined_instruction:
246 bl do_undefined_instruction
252 bl do_software_interrupt
285 #endif /* CONFIG_SPL_BUILD */