1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * vectors - Generic ARM exception table code
5 * Copyright (c) 1998 Dan Malek <dmalek@jlc.net>
6 * Copyright (c) 1999 Magnus Damm <kieraypc01.p.y.kie.era.ericsson.se>
7 * Copyright (c) 2000 Wolfgang Denk <wd@denx.de>
8 * Copyright (c) 2001 Alex Züpke <azu@sysgo.de>
9 * Copyright (c) 2001 Marius Gröger <mag@sysgo.de>
10 * Copyright (c) 2002 Alex Züpke <azu@sysgo.de>
11 * Copyright (c) 2002 Gary Jennejohn <garyj@denx.de>
12 * Copyright (c) 2002 Kyle Harris <kharris@nexus-tech.net>
18 * A macro to allow insertion of an ARM exception vector either
19 * for the non-boot0 case or by a boot0-header.
27 ldr pc, _undefined_instruction
28 ldr pc, _software_interrupt
29 ldr pc, _prefetch_abort
38 *************************************************************************
40 * Symbol _start is referenced elsewhere, so make it global
42 *************************************************************************
48 *************************************************************************
50 * Vectors have their own section so linker script can map them easily
52 *************************************************************************
55 .section ".vectors", "ax"
57 #if defined(CONFIG_ENABLE_ARM_SOC_BOOT0_HOOK)
59 * Various SoCs need something special and SoC-specific up front in
60 * order to boot, allow them to set that in their boot0.h file and then
63 * To allow a boot0 hook to insert a 'special' sequence after the vector
64 * table (e.g. for the socfpga), the presence of a boot0 hook supresses
65 * the below vector table and assumes that the vector table is filled in
66 * by the boot0 hook. The requirements for a boot0 hook thus are:
67 * (1) defines '_start:' as appropriate
68 * (2) inserts the vector table using ARM_VECTORS as appropriate
70 #ifdef CONFIG_ARCH_ROCKCHIP
71 #include <asm/arch-rockchip/boot0.h>
73 #include <asm/arch/boot0.h>
78 *************************************************************************
80 * Exception vectors as described in ARM reference manuals
82 * Uses indirect branch to allow reaching handlers anywhere in memory.
84 *************************************************************************
88 #ifdef CONFIG_SYS_DV_NOR_BOOT_CFG
89 .word CONFIG_SYS_DV_NOR_BOOT_CFG
92 #endif /* !defined(CONFIG_ENABLE_ARM_SOC_BOOT0_HOOK) */
95 *************************************************************************
97 * Indirect vectors table
99 * Symbols referenced here must be defined somewhere else
101 *************************************************************************
105 .globl _undefined_instruction
106 .globl _software_interrupt
107 .globl _prefetch_abort
113 #ifdef CONFIG_ARCH_K3
116 _undefined_instruction: .word undefined_instruction
117 _software_interrupt: .word software_interrupt
118 _prefetch_abort: .word prefetch_abort
119 _data_abort: .word data_abort
120 _not_used: .word not_used
124 .balignl 16,0xdeadbeef
127 *************************************************************************
131 *************************************************************************
134 /* SPL interrupt handling: just hang */
136 #ifdef CONFIG_SPL_BUILD
139 undefined_instruction:
147 b 1b /* hang and never return */
149 #else /* !CONFIG_SPL_BUILD */
151 /* IRQ stack memory (calculated at run-time) + 8 bytes */
152 .globl IRQ_STACK_START_IN
154 #ifdef IRAM_BASE_ADDR
155 .word IRAM_BASE_ADDR + 0x20
163 #define S_FRAME_SIZE 72
185 #define MODE_SVC 0x13
189 * use bad_save_user_regs for abort/prefetch/undef/swi ...
190 * use irq_save_user_regs / irq_restore_user_regs for IRQ/FIQ handling
193 .macro bad_save_user_regs
194 @ carve out a frame on current user stack
195 sub sp, sp, #S_FRAME_SIZE
196 stmia sp, {r0 - r12} @ Save user registers (now in svc mode) r0-r12
197 ldr r2, IRQ_STACK_START_IN
198 @ get values for "aborted" pc and cpsr (into parm regs)
200 add r0, sp, #S_FRAME_SIZE @ grab pointer to old stack
203 stmia r5, {r0 - r3} @ save sp_SVC, lr_SVC, pc, cpsr
204 mov r0, sp @ save current stack into r0 (param register)
207 .macro irq_save_user_regs
208 sub sp, sp, #S_FRAME_SIZE
209 stmia sp, {r0 - r12} @ Calling r0-r12
210 @ !!!! R8 NEEDS to be saved !!!! a reserved stack spot would be good.
212 stmdb r8, {sp, lr}^ @ Calling SP, LR
213 str lr, [r8, #0] @ Save calling PC
215 str r6, [r8, #4] @ Save CPSR
216 str r0, [r8, #8] @ Save OLD_R0
220 .macro irq_restore_user_regs
221 ldmia sp, {r0 - lr}^ @ Calling r0 - lr
223 ldr lr, [sp, #S_PC] @ Get PC
224 add sp, sp, #S_FRAME_SIZE
225 subs pc, lr, #4 @ return & move spsr_svc into cpsr
229 ldr r13, IRQ_STACK_START_IN @ setup our mode stack
231 str lr, [r13] @ save caller lr in position 0 of saved stack
232 mrs lr, spsr @ get the spsr
233 str lr, [r13, #4] @ save spsr in position 1 of saved stack
234 mov r13, #MODE_SVC @ prepare SVC-Mode
236 msr spsr, r13 @ switch modes, make sure moves will execute
237 mov lr, pc @ capture return pc
238 movs pc, lr @ jump to next instruction & switch modes.
241 .macro get_irq_stack @ setup IRQ stack
242 ldr sp, IRQ_STACK_START
245 .macro get_fiq_stack @ setup FIQ stack
246 ldr sp, FIQ_STACK_START
254 undefined_instruction:
257 bl do_undefined_instruction
263 bl do_software_interrupt
296 #endif /* CONFIG_SPL_BUILD */