1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * vectors - Generic ARM exception table code
5 * Copyright (c) 1998 Dan Malek <dmalek@jlc.net>
6 * Copyright (c) 1999 Magnus Damm <kieraypc01.p.y.kie.era.ericsson.se>
7 * Copyright (c) 2000 Wolfgang Denk <wd@denx.de>
8 * Copyright (c) 2001 Alex Züpke <azu@sysgo.de>
9 * Copyright (c) 2001 Marius Gröger <mag@sysgo.de>
10 * Copyright (c) 2002 Alex Züpke <azu@sysgo.de>
11 * Copyright (c) 2002 Gary Jennejohn <garyj@denx.de>
12 * Copyright (c) 2002 Kyle Harris <kharris@nexus-tech.net>
18 * A macro to allow insertion of an ARM exception vector either
19 * for the non-boot0 case or by a boot0-header.
27 ldr pc, _undefined_instruction
28 ldr pc, _software_interrupt
29 ldr pc, _prefetch_abort
38 *************************************************************************
40 * Symbol _start is referenced elsewhere, so make it global
42 *************************************************************************
48 *************************************************************************
50 * Vectors have their own section so linker script can map them easily
52 *************************************************************************
55 .section ".vectors", "ax"
57 #if defined(CONFIG_ENABLE_ARM_SOC_BOOT0_HOOK)
59 * Various SoCs need something special and SoC-specific up front in
60 * order to boot, allow them to set that in their boot0.h file and then
63 * To allow a boot0 hook to insert a 'special' sequence after the vector
64 * table (e.g. for the socfpga), the presence of a boot0 hook supresses
65 * the below vector table and assumes that the vector table is filled in
66 * by the boot0 hook. The requirements for a boot0 hook thus are:
67 * (1) defines '_start:' as appropriate
68 * (2) inserts the vector table using ARM_VECTORS as appropriate
70 #include <asm/arch/boot0.h>
75 *************************************************************************
77 * Exception vectors as described in ARM reference manuals
79 * Uses indirect branch to allow reaching handlers anywhere in memory.
81 *************************************************************************
85 #ifdef CONFIG_SYS_DV_NOR_BOOT_CFG
86 .word CONFIG_SYS_DV_NOR_BOOT_CFG
89 #endif /* !defined(CONFIG_ENABLE_ARM_SOC_BOOT0_HOOK) */
92 *************************************************************************
94 * Indirect vectors table
96 * Symbols referenced here must be defined somewhere else
98 *************************************************************************
102 .globl _undefined_instruction
103 .globl _software_interrupt
104 .globl _prefetch_abort
110 #ifdef CONFIG_ARCH_K3
113 _undefined_instruction: .word undefined_instruction
114 _software_interrupt: .word software_interrupt
115 _prefetch_abort: .word prefetch_abort
116 _data_abort: .word data_abort
117 _not_used: .word not_used
121 .balignl 16,0xdeadbeef
124 *************************************************************************
128 *************************************************************************
131 /* SPL interrupt handling: just hang */
133 #ifdef CONFIG_SPL_BUILD
136 undefined_instruction:
144 b 1b /* hang and never return */
146 #else /* !CONFIG_SPL_BUILD */
148 /* IRQ stack memory (calculated at run-time) + 8 bytes */
149 .globl IRQ_STACK_START_IN
151 #ifdef IRAM_BASE_ADDR
152 .word IRAM_BASE_ADDR + 0x20
160 #define S_FRAME_SIZE 72
182 #define MODE_SVC 0x13
186 * use bad_save_user_regs for abort/prefetch/undef/swi ...
187 * use irq_save_user_regs / irq_restore_user_regs for IRQ/FIQ handling
190 .macro bad_save_user_regs
191 @ carve out a frame on current user stack
192 sub sp, sp, #S_FRAME_SIZE
193 stmia sp, {r0 - r12} @ Save user registers (now in svc mode) r0-r12
194 ldr r2, IRQ_STACK_START_IN
195 @ get values for "aborted" pc and cpsr (into parm regs)
197 add r0, sp, #S_FRAME_SIZE @ grab pointer to old stack
200 stmia r5, {r0 - r3} @ save sp_SVC, lr_SVC, pc, cpsr
201 mov r0, sp @ save current stack into r0 (param register)
204 .macro irq_save_user_regs
205 sub sp, sp, #S_FRAME_SIZE
206 stmia sp, {r0 - r12} @ Calling r0-r12
207 @ !!!! R8 NEEDS to be saved !!!! a reserved stack spot would be good.
209 stmdb r8, {sp, lr}^ @ Calling SP, LR
210 str lr, [r8, #0] @ Save calling PC
212 str r6, [r8, #4] @ Save CPSR
213 str r0, [r8, #8] @ Save OLD_R0
217 .macro irq_restore_user_regs
218 ldmia sp, {r0 - lr}^ @ Calling r0 - lr
220 ldr lr, [sp, #S_PC] @ Get PC
221 add sp, sp, #S_FRAME_SIZE
222 subs pc, lr, #4 @ return & move spsr_svc into cpsr
226 ldr r13, IRQ_STACK_START_IN @ setup our mode stack
228 str lr, [r13] @ save caller lr in position 0 of saved stack
229 mrs lr, spsr @ get the spsr
230 str lr, [r13, #4] @ save spsr in position 1 of saved stack
231 mov r13, #MODE_SVC @ prepare SVC-Mode
233 msr spsr, r13 @ switch modes, make sure moves will execute
234 mov lr, pc @ capture return pc
235 movs pc, lr @ jump to next instruction & switch modes.
238 .macro get_irq_stack @ setup IRQ stack
239 ldr sp, IRQ_STACK_START
242 .macro get_fiq_stack @ setup FIQ stack
243 ldr sp, FIQ_STACK_START
251 undefined_instruction:
254 bl do_undefined_instruction
260 bl do_software_interrupt
293 #endif /* CONFIG_SPL_BUILD */