1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * relocate - common relocation function for AArch64 U-Boot
6 * Albert ARIBAUD <albert.u.boot@aribaud.net>
7 * David Feng <fenghua@phytium.com.cn>
10 #include <asm-offsets.h>
13 #include <linux/linkage.h>
14 #include <asm/macro.h>
17 * void relocate_code (addr_moni)
19 * This function relocates the monitor code.
20 * x0 holds the destination address.
23 stp x29, x30, [sp, #-32]! /* create a stack frame */
27 * Copy u-boot from flash to RAM
29 adrp x1, __image_copy_start /* x1 <- address bits [31:12] */
30 add x1, x1, :lo12:__image_copy_start/* x1 <- address bits [11:00] */
31 subs x9, x0, x1 /* x9 <- Run to copy offset */
32 b.eq relocate_done /* skip relocation */
34 * Don't ldr x1, __image_copy_start here, since if the code is already
35 * running at an address other than it was linked to, that instruction
36 * will load the relocated value of __image_copy_start. To
37 * correctly apply relocations, we need to know the linked value.
39 * Linked &__image_copy_start, which we know was at
40 * CONFIG_SYS_TEXT_BASE, which is stored in _TEXT_BASE, as a non-
41 * relocated value, since it isn't a symbol reference.
43 ldr x1, _TEXT_BASE /* x1 <- Linked &__image_copy_start */
44 subs x9, x0, x1 /* x9 <- Link to copy offset */
46 adrp x1, __image_copy_start /* x1 <- address bits [31:12] */
47 add x1, x1, :lo12:__image_copy_start/* x1 <- address bits [11:00] */
48 adrp x2, __image_copy_end /* x2 <- address bits [31:12] */
49 add x2, x2, :lo12:__image_copy_end /* x2 <- address bits [11:00] */
51 ldp x10, x11, [x1], #16 /* copy from source address [x1] */
52 stp x10, x11, [x0], #16 /* copy to target address [x0] */
53 cmp x1, x2 /* until source end address [x2] */
58 * Fix .rela.dyn relocations
60 adrp x2, __rel_dyn_start /* x2 <- address bits [31:12] */
61 add x2, x2, :lo12:__rel_dyn_start /* x2 <- address bits [11:00] */
62 adrp x3, __rel_dyn_end /* x3 <- address bits [31:12] */
63 add x3, x3, :lo12:__rel_dyn_end /* x3 <- address bits [11:00] */
65 ldp x0, x1, [x2], #16 /* (x0,x1) <- (SRC location, fixup) */
66 ldr x4, [x2], #8 /* x4 <- addend */
67 and x1, x1, #0xffffffff
68 cmp x1, #R_AARCH64_RELATIVE
71 /* relative fix: store addend plus offset at dest location */
80 switch_el x1, 3f, 2f, 1f
87 0: tbz w0, #2, 5f /* skip flushing cache if disabled */
88 tbz w0, #12, 4f /* skip invalidating i-cache if disabled */
89 ic iallu /* i-cache invalidate all */
91 4: ldp x0, x1, [sp, #16]
92 bl __asm_flush_dcache_range
93 bl __asm_flush_l3_dcache
94 5: ldp x29, x30, [sp],#32
96 ENDPROC(relocate_code)