2 @ libgcc1 routines for ARM cpu.
3 @ Division routines, written by Richard Earnshaw, (rearnsha@armltd.co.uk)
14 .type __udivsi3 ,function
16 .type __aeabi_uidiv ,function
27 @ Unless the divisor is very big, shift it up in multiples of
28 @ four bits, since this is the amount of unwinding in the main
29 @ division loop. Continue shifting until the divisor is
30 @ larger than the dividend.
31 cmp divisor, #0x10000000
32 cmpcc divisor, dividend
33 movcc divisor, divisor, lsl #4
34 movcc curbit, curbit, lsl #4
37 @ For very big divisors, we must shift it a bit at a time, or
38 @ we will be in danger of overflowing.
39 cmp divisor, #0x80000000
40 cmpcc divisor, dividend
41 movcc divisor, divisor, lsl #1
42 movcc curbit, curbit, lsl #1
45 @ Test for possible subtractions, and note which bits
46 @ are done in the result. On the final pass, this may subtract
47 @ too much from the dividend, but the result will be ok, since the
48 @ "bit" will have been shifted out at the bottom.
50 subcs dividend, dividend, divisor
51 orrcs result, result, curbit
52 cmp dividend, divisor, lsr #1
53 subcs dividend, dividend, divisor, lsr #1
54 orrcs result, result, curbit, lsr #1
55 cmp dividend, divisor, lsr #2
56 subcs dividend, dividend, divisor, lsr #2
57 orrcs result, result, curbit, lsr #2
58 cmp dividend, divisor, lsr #3
59 subcs dividend, dividend, divisor, lsr #3
60 orrcs result, result, curbit, lsr #3
61 cmp dividend, #0 @ Early termination?
62 movnes curbit, curbit, lsr #4 @ No, any more bits to do?
63 movne divisor, divisor, lsr #4
71 mov r0, #0 @ about as wrong as it could be
73 .size __udivsi3 , . - __udivsi3
75 .globl __aeabi_uidivmod
78 stmfd sp!, {r0, r1, ip, lr}
80 ldmfd sp!, {r1, r2, ip, lr}
85 .globl __aeabi_idivmod
88 stmfd sp!, {r0, r1, ip, lr}
90 ldmfd sp!, {r1, r2, ip, lr}