2 * linux/include/asm-arm/proc-armv/ptrace.h
4 * Copyright (C) 1996-1999 Russell King
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
10 #ifndef __ASM_PROC_PTRACE_H
11 #define __ASM_PROC_PTRACE_H
20 * This struct defines the way the registers are stored
21 * on the stack during an exception.
25 unsigned long regs[31];
28 #endif /* __ASSEMBLY__ */
30 #else /* CONFIG_ARM64 */
32 #define USR26_MODE 0x00
33 #define FIQ26_MODE 0x01
34 #define IRQ26_MODE 0x02
35 #define SVC26_MODE 0x03
42 #define SYSTEM_MODE 0x1f
43 #define MODE_MASK 0x1f
47 #define CC_V_BIT (1 << 28)
48 #define CC_C_BIT (1 << 29)
49 #define CC_Z_BIT (1 << 30)
50 #define CC_N_BIT (1 << 31)
55 /* this struct defines the way the registers are stored on the
56 stack during a system call. */
62 #define ARM_cpsr uregs[16]
63 #define ARM_pc uregs[15]
64 #define ARM_lr uregs[14]
65 #define ARM_sp uregs[13]
66 #define ARM_ip uregs[12]
67 #define ARM_fp uregs[11]
68 #define ARM_r10 uregs[10]
69 #define ARM_r9 uregs[9]
70 #define ARM_r8 uregs[8]
71 #define ARM_r7 uregs[7]
72 #define ARM_r6 uregs[6]
73 #define ARM_r5 uregs[5]
74 #define ARM_r4 uregs[4]
75 #define ARM_r3 uregs[3]
76 #define ARM_r2 uregs[2]
77 #define ARM_r1 uregs[1]
78 #define ARM_r0 uregs[0]
79 #define ARM_ORIG_r0 uregs[17]
83 #define user_mode(regs) \
84 (((regs)->ARM_cpsr & 0xf) == 0)
86 #ifdef CONFIG_ARM_THUMB
87 #define thumb_mode(regs) \
88 (((regs)->ARM_cpsr & T_BIT))
90 #define thumb_mode(regs) (0)
93 #define processor_mode(regs) \
94 ((regs)->ARM_cpsr & MODE_MASK)
96 #define interrupts_enabled(regs) \
97 (!((regs)->ARM_cpsr & I_BIT))
99 #define fast_interrupts_enabled(regs) \
100 (!((regs)->ARM_cpsr & F_BIT))
102 #define condition_codes(regs) \
103 ((regs)->ARM_cpsr & (CC_V_BIT|CC_C_BIT|CC_Z_BIT|CC_N_BIT))
105 /* Are the current registers suitable for user mode?
106 * (used to maintain security in signal handlers)
108 static inline int valid_user_regs(struct pt_regs *regs)
110 if ((regs->ARM_cpsr & 0xf) == 0 &&
111 (regs->ARM_cpsr & (F_BIT|I_BIT)) == 0)
115 * Force CPSR to something logical...
117 regs->ARM_cpsr &= (CC_V_BIT|CC_C_BIT|CC_Z_BIT|CC_N_BIT|0x10);
122 #endif /* __KERNEL__ */
124 #endif /* __ASSEMBLY__ */
126 #endif /* CONFIG_ARM64 */