2 * (C) Copyright 2004-2008 Texas Instruments, <www.ti.com>
3 * Rohit Choraria <rohitkc@ti.com>
5 * (C) Copyright 2013 Andreas Bießmann <andreas.devel@googlemail.com>
7 * SPDX-License-Identifier: GPL-2.0+
9 #ifndef __ASM_OMAP_GPMC_H
10 #define __ASM_OMAP_GPMC_H
12 #include <asm/arch/omap_gpmc.h>
14 #define GPMC_BUF_EMPTY 0
15 #define GPMC_BUF_FULL 1
17 /* Generic ECC Layouts */
18 /* Large Page x8 NAND device Layout */
19 #ifdef GPMC_NAND_ECC_LP_x8_LAYOUT
20 #define GPMC_NAND_HW_ECC_LAYOUT {\
22 .eccpos = {1, 2, 3, 4, 5, 6, 7, 8,\
30 /* Large Page x16 NAND device Layout */
31 #ifdef GPMC_NAND_ECC_LP_x16_LAYOUT
32 #define GPMC_NAND_HW_ECC_LAYOUT {\
34 .eccpos = {2, 3, 4, 5, 6, 7, 8, 9,\
42 /* Small Page x8 NAND device Layout */
43 #ifdef GPMC_NAND_ECC_SP_x8_LAYOUT
44 #define GPMC_NAND_HW_ECC_LAYOUT {\
53 /* Small Page x16 NAND device Layout */
54 #ifdef GPMC_NAND_ECC_SP_x16_LAYOUT
55 #define GPMC_NAND_HW_ECC_LAYOUT {\
65 /* 1-bit ECC calculation by Software, Error detection by Software */
66 OMAP_ECC_HAM1_CODE_SW = 1, /* avoid un-initialized int can be 0x0 */
67 /* 1-bit ECC calculation by GPMC, Error detection by Software */
68 /* ECC layout compatible to legacy ROMCODE. */
69 OMAP_ECC_HAM1_CODE_HW,
70 /* 4-bit ECC calculation by GPMC, Error detection by Software */
71 OMAP_ECC_BCH4_CODE_HW_DETECTION_SW,
72 /* 4-bit ECC calculation by GPMC, Error detection by ELM */
73 OMAP_ECC_BCH4_CODE_HW,
74 /* 8-bit ECC calculation by GPMC, Error detection by Software */
75 OMAP_ECC_BCH8_CODE_HW_DETECTION_SW,
76 /* 8-bit ECC calculation by GPMC, Error detection by ELM */
77 OMAP_ECC_BCH8_CODE_HW,
80 #endif /* __ASM_OMAP_GPMC_H */