2 * Copyright (c) 2010-2013, NVIDIA CORPORATION. All rights reserved.
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms and conditions of the GNU General Public License,
6 * version 2, as published by the Free Software Foundation.
8 * This program is distributed in the hope it will be useful, but WITHOUT
9 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
10 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 * You should have received a copy of the GNU General Public License
14 * along with this program. If not, see <http://www.gnu.org/licenses/>.
17 #ifndef _TEGRA30_PINMUX_H_
18 #define _TEGRA30_PINMUX_H_
21 * Pin groups which we adjust. There are three basic attributes of each pin
22 * group which use this enum:
26 * - tristate or normal
29 PINGRP_ULPI_DATA0 = 0, /* offset 0x3000 */
267 PINGRP_PEX_L0_PRSNT_N,
269 PINGRP_PEX_L0_CLKREQ_N,
271 PINGRP_PEX_L1_PRSNT_N,
273 PINGRP_PEX_L1_CLKREQ_N,
274 PINGRP_PEX_L2_PRSNT_N,
276 PINGRP_PEX_L2_CLKREQ_N,
277 PINGRP_HDMI_CEC, /* offset 0x33e0 */
282 PDRIVE_PINGROUP_AO1 = 0, /* offset 0x868 */
289 PDRIVE_PINGROUP_CDEV1,
290 PDRIVE_PINGROUP_CDEV2,
291 PDRIVE_PINGROUP_CSUS,
292 PDRIVE_PINGROUP_DAP1,
293 PDRIVE_PINGROUP_DAP2,
294 PDRIVE_PINGROUP_DAP3,
295 PDRIVE_PINGROUP_DAP4,
297 PDRIVE_PINGROUP_LCD1,
298 PDRIVE_PINGROUP_LCD2,
299 PDRIVE_PINGROUP_SDIO2,
300 PDRIVE_PINGROUP_SDIO3,
304 PDRIVE_PINGROUP_UART2,
305 PDRIVE_PINGROUP_UART3,
306 PDRIVE_PINGROUP_VI1 = 24, /* offset 0x8c8 */
307 PDRIVE_PINGROUP_SDIO1 = 33, /* offset 0x8ec */
308 PDRIVE_PINGROUP_CRT = 36, /* offset 0x8f8 */
321 PDRIVE_PINGROUP_DEV3 = 49, /* offset 0x92c */
322 PDRIVE_PINGROUP_CEC = 52, /* offset 0x938 */
327 * Functions which can be assigned to each of the pin groups. The values here
328 * bear no relation to the values programmed into pinmux registers and are
329 * purely a convenience. The translation is done through a table search.
334 PMUX_FUNC_AUDIO_SYNC,
343 PMUX_FUNC_EMC_TEST0_DLL,
344 PMUX_FUNC_EMC_TEST1_DLL,
389 PMUX_FUNC_VI_SENSOR_CLK,
403 PMUX_FUNC_EXTPERIPH1,
404 PMUX_FUNC_EXTPERIPH2,
405 PMUX_FUNC_EXTPERIPH3,
434 PMUX_FUNC_CLK_12M_OUT,
437 PMUX_FUNC_CORE_PWR_REQ,
438 PMUX_FUNC_CPU_PWR_REQ,
440 PMUX_FUNC_CLK_32K_IN,
444 PMUX_FUNC_RSVD1 = 0x8000,
445 PMUX_FUNC_RSVD2 = 0x8001,
446 PMUX_FUNC_RSVD3 = 0x8002,
447 PMUX_FUNC_RSVD4 = 0x8003,
450 #define TEGRA_PMX_HAS_PIN_IO_BIT_ETC
451 #define TEGRA_PMX_HAS_DRVGRPS
452 #include <asm/arch-tegra/pinmux.h>
454 #endif /* _TEGRA30_PINMUX_H_ */