imx6: Add include guards for include/asm/arch-mx6/sys_proto.h file
[oweals/u-boot.git] / arch / arm / include / asm / arch-tegra210 / pinmux.h
1 /*
2  * Copyright (c) 2015, NVIDIA CORPORATION. All rights reserved.
3  *
4  * SPDX-License-Identifier: GPL-2.0+
5  */
6
7 #ifndef _TEGRA210_PINMUX_H_
8 #define _TEGRA210_PINMUX_H_
9
10 enum pmux_pingrp {
11         PMUX_PINGRP_SDMMC1_CLK_PM0,
12         PMUX_PINGRP_SDMMC1_CMD_PM1,
13         PMUX_PINGRP_SDMMC1_DAT3_PM2,
14         PMUX_PINGRP_SDMMC1_DAT2_PM3,
15         PMUX_PINGRP_SDMMC1_DAT1_PM4,
16         PMUX_PINGRP_SDMMC1_DAT0_PM5,
17         PMUX_PINGRP_SDMMC3_CLK_PP0 = (0x1c / 4),
18         PMUX_PINGRP_SDMMC3_CMD_PP1,
19         PMUX_PINGRP_SDMMC3_DAT0_PP5,
20         PMUX_PINGRP_SDMMC3_DAT1_PP4,
21         PMUX_PINGRP_SDMMC3_DAT2_PP3,
22         PMUX_PINGRP_SDMMC3_DAT3_PP2,
23         PMUX_PINGRP_PEX_L0_RST_N_PA0 = (0x38 / 4),
24         PMUX_PINGRP_PEX_L0_CLKREQ_N_PA1,
25         PMUX_PINGRP_PEX_WAKE_N_PA2,
26         PMUX_PINGRP_PEX_L1_RST_N_PA3,
27         PMUX_PINGRP_PEX_L1_CLKREQ_N_PA4,
28         PMUX_PINGRP_SATA_LED_ACTIVE_PA5,
29         PMUX_PINGRP_SPI1_MOSI_PC0,
30         PMUX_PINGRP_SPI1_MISO_PC1,
31         PMUX_PINGRP_SPI1_SCK_PC2,
32         PMUX_PINGRP_SPI1_CS0_PC3,
33         PMUX_PINGRP_SPI1_CS1_PC4,
34         PMUX_PINGRP_SPI2_MOSI_PB4,
35         PMUX_PINGRP_SPI2_MISO_PB5,
36         PMUX_PINGRP_SPI2_SCK_PB6,
37         PMUX_PINGRP_SPI2_CS0_PB7,
38         PMUX_PINGRP_SPI2_CS1_PDD0,
39         PMUX_PINGRP_SPI4_MOSI_PC7,
40         PMUX_PINGRP_SPI4_MISO_PD0,
41         PMUX_PINGRP_SPI4_SCK_PC5,
42         PMUX_PINGRP_SPI4_CS0_PC6,
43         PMUX_PINGRP_QSPI_SCK_PEE0,
44         PMUX_PINGRP_QSPI_CS_N_PEE1,
45         PMUX_PINGRP_QSPI_IO0_PEE2,
46         PMUX_PINGRP_QSPI_IO1_PEE3,
47         PMUX_PINGRP_QSPI_IO2_PEE4,
48         PMUX_PINGRP_QSPI_IO3_PEE5,
49         PMUX_PINGRP_DMIC1_CLK_PE0 = (0xa4 / 4),
50         PMUX_PINGRP_DMIC1_DAT_PE1,
51         PMUX_PINGRP_DMIC2_CLK_PE2,
52         PMUX_PINGRP_DMIC2_DAT_PE3,
53         PMUX_PINGRP_DMIC3_CLK_PE4,
54         PMUX_PINGRP_DMIC3_DAT_PE5,
55         PMUX_PINGRP_GEN1_I2C_SCL_PJ1,
56         PMUX_PINGRP_GEN1_I2C_SDA_PJ0,
57         PMUX_PINGRP_GEN2_I2C_SCL_PJ2,
58         PMUX_PINGRP_GEN2_I2C_SDA_PJ3,
59         PMUX_PINGRP_GEN3_I2C_SCL_PF0,
60         PMUX_PINGRP_GEN3_I2C_SDA_PF1,
61         PMUX_PINGRP_CAM_I2C_SCL_PS2,
62         PMUX_PINGRP_CAM_I2C_SDA_PS3,
63         PMUX_PINGRP_PWR_I2C_SCL_PY3,
64         PMUX_PINGRP_PWR_I2C_SDA_PY4,
65         PMUX_PINGRP_UART1_TX_PU0,
66         PMUX_PINGRP_UART1_RX_PU1,
67         PMUX_PINGRP_UART1_RTS_PU2,
68         PMUX_PINGRP_UART1_CTS_PU3,
69         PMUX_PINGRP_UART2_TX_PG0,
70         PMUX_PINGRP_UART2_RX_PG1,
71         PMUX_PINGRP_UART2_RTS_PG2,
72         PMUX_PINGRP_UART2_CTS_PG3,
73         PMUX_PINGRP_UART3_TX_PD1,
74         PMUX_PINGRP_UART3_RX_PD2,
75         PMUX_PINGRP_UART3_RTS_PD3,
76         PMUX_PINGRP_UART3_CTS_PD4,
77         PMUX_PINGRP_UART4_TX_PI4,
78         PMUX_PINGRP_UART4_RX_PI5,
79         PMUX_PINGRP_UART4_RTS_PI6,
80         PMUX_PINGRP_UART4_CTS_PI7,
81         PMUX_PINGRP_DAP1_FS_PB0,
82         PMUX_PINGRP_DAP1_DIN_PB1,
83         PMUX_PINGRP_DAP1_DOUT_PB2,
84         PMUX_PINGRP_DAP1_SCLK_PB3,
85         PMUX_PINGRP_DAP2_FS_PAA0,
86         PMUX_PINGRP_DAP2_DIN_PAA2,
87         PMUX_PINGRP_DAP2_DOUT_PAA3,
88         PMUX_PINGRP_DAP2_SCLK_PAA1,
89         PMUX_PINGRP_DAP4_FS_PJ4,
90         PMUX_PINGRP_DAP4_DIN_PJ5,
91         PMUX_PINGRP_DAP4_DOUT_PJ6,
92         PMUX_PINGRP_DAP4_SCLK_PJ7,
93         PMUX_PINGRP_CAM1_MCLK_PS0,
94         PMUX_PINGRP_CAM2_MCLK_PS1,
95         PMUX_PINGRP_JTAG_RTCK,
96         PMUX_PINGRP_CLK_32K_IN,
97         PMUX_PINGRP_CLK_32K_OUT_PY5,
98         PMUX_PINGRP_BATT_BCL,
99         PMUX_PINGRP_CLK_REQ,
100         PMUX_PINGRP_CPU_PWR_REQ,
101         PMUX_PINGRP_PWR_INT_N,
102         PMUX_PINGRP_SHUTDOWN,
103         PMUX_PINGRP_CORE_PWR_REQ,
104         PMUX_PINGRP_AUD_MCLK_PBB0,
105         PMUX_PINGRP_DVFS_PWM_PBB1,
106         PMUX_PINGRP_DVFS_CLK_PBB2,
107         PMUX_PINGRP_GPIO_X1_AUD_PBB3,
108         PMUX_PINGRP_GPIO_X3_AUD_PBB4,
109         PMUX_PINGRP_PCC7,
110         PMUX_PINGRP_HDMI_CEC_PCC0,
111         PMUX_PINGRP_HDMI_INT_DP_HPD_PCC1,
112         PMUX_PINGRP_SPDIF_OUT_PCC2,
113         PMUX_PINGRP_SPDIF_IN_PCC3,
114         PMUX_PINGRP_USB_VBUS_EN0_PCC4,
115         PMUX_PINGRP_USB_VBUS_EN1_PCC5,
116         PMUX_PINGRP_DP_HPD0_PCC6,
117         PMUX_PINGRP_WIFI_EN_PH0,
118         PMUX_PINGRP_WIFI_RST_PH1,
119         PMUX_PINGRP_WIFI_WAKE_AP_PH2,
120         PMUX_PINGRP_AP_WAKE_BT_PH3,
121         PMUX_PINGRP_BT_RST_PH4,
122         PMUX_PINGRP_BT_WAKE_AP_PH5,
123         PMUX_PINGRP_AP_WAKE_NFC_PH7,
124         PMUX_PINGRP_NFC_EN_PI0,
125         PMUX_PINGRP_NFC_INT_PI1,
126         PMUX_PINGRP_GPS_EN_PI2,
127         PMUX_PINGRP_GPS_RST_PI3,
128         PMUX_PINGRP_CAM_RST_PS4,
129         PMUX_PINGRP_CAM_AF_EN_PS5,
130         PMUX_PINGRP_CAM_FLASH_EN_PS6,
131         PMUX_PINGRP_CAM1_PWDN_PS7,
132         PMUX_PINGRP_CAM2_PWDN_PT0,
133         PMUX_PINGRP_CAM1_STROBE_PT1,
134         PMUX_PINGRP_LCD_TE_PY2,
135         PMUX_PINGRP_LCD_BL_PWM_PV0,
136         PMUX_PINGRP_LCD_BL_EN_PV1,
137         PMUX_PINGRP_LCD_RST_PV2,
138         PMUX_PINGRP_LCD_GPIO1_PV3,
139         PMUX_PINGRP_LCD_GPIO2_PV4,
140         PMUX_PINGRP_AP_READY_PV5,
141         PMUX_PINGRP_TOUCH_RST_PV6,
142         PMUX_PINGRP_TOUCH_CLK_PV7,
143         PMUX_PINGRP_MODEM_WAKE_AP_PX0,
144         PMUX_PINGRP_TOUCH_INT_PX1,
145         PMUX_PINGRP_MOTION_INT_PX2,
146         PMUX_PINGRP_ALS_PROX_INT_PX3,
147         PMUX_PINGRP_TEMP_ALERT_PX4,
148         PMUX_PINGRP_BUTTON_POWER_ON_PX5,
149         PMUX_PINGRP_BUTTON_VOL_UP_PX6,
150         PMUX_PINGRP_BUTTON_VOL_DOWN_PX7,
151         PMUX_PINGRP_BUTTON_SLIDE_SW_PY0,
152         PMUX_PINGRP_BUTTON_HOME_PY1,
153         PMUX_PINGRP_PA6,
154         PMUX_PINGRP_PE6,
155         PMUX_PINGRP_PE7,
156         PMUX_PINGRP_PH6,
157         PMUX_PINGRP_PK0,
158         PMUX_PINGRP_PK1,
159         PMUX_PINGRP_PK2,
160         PMUX_PINGRP_PK3,
161         PMUX_PINGRP_PK4,
162         PMUX_PINGRP_PK5,
163         PMUX_PINGRP_PK6,
164         PMUX_PINGRP_PK7,
165         PMUX_PINGRP_PL0,
166         PMUX_PINGRP_PL1,
167         PMUX_PINGRP_PZ0,
168         PMUX_PINGRP_PZ1,
169         PMUX_PINGRP_PZ2,
170         PMUX_PINGRP_PZ3,
171         PMUX_PINGRP_PZ4,
172         PMUX_PINGRP_PZ5,
173         PMUX_PINGRP_COUNT,
174 };
175
176 enum pmux_drvgrp {
177         PMUX_DRVGRP_ALS_PROX_INT = (0x10 / 4),
178         PMUX_DRVGRP_AP_READY,
179         PMUX_DRVGRP_AP_WAKE_BT,
180         PMUX_DRVGRP_AP_WAKE_NFC,
181         PMUX_DRVGRP_AUD_MCLK,
182         PMUX_DRVGRP_BATT_BCL,
183         PMUX_DRVGRP_BT_RST,
184         PMUX_DRVGRP_BT_WAKE_AP,
185         PMUX_DRVGRP_BUTTON_HOME,
186         PMUX_DRVGRP_BUTTON_POWER_ON,
187         PMUX_DRVGRP_BUTTON_SLIDE_SW,
188         PMUX_DRVGRP_BUTTON_VOL_DOWN,
189         PMUX_DRVGRP_BUTTON_VOL_UP,
190         PMUX_DRVGRP_CAM1_MCLK,
191         PMUX_DRVGRP_CAM1_PWDN,
192         PMUX_DRVGRP_CAM1_STROBE,
193         PMUX_DRVGRP_CAM2_MCLK,
194         PMUX_DRVGRP_CAM2_PWDN,
195         PMUX_DRVGRP_CAM_AF_EN,
196         PMUX_DRVGRP_CAM_FLASH_EN,
197         PMUX_DRVGRP_CAM_I2C_SCL,
198         PMUX_DRVGRP_CAM_I2C_SDA,
199         PMUX_DRVGRP_CAM_RST,
200         PMUX_DRVGRP_CLK_32K_IN,
201         PMUX_DRVGRP_CLK_32K_OUT,
202         PMUX_DRVGRP_CLK_REQ,
203         PMUX_DRVGRP_CORE_PWR_REQ,
204         PMUX_DRVGRP_CPU_PWR_REQ,
205         PMUX_DRVGRP_DAP1_DIN,
206         PMUX_DRVGRP_DAP1_DOUT,
207         PMUX_DRVGRP_DAP1_FS,
208         PMUX_DRVGRP_DAP1_SCLK,
209         PMUX_DRVGRP_DAP2_DIN,
210         PMUX_DRVGRP_DAP2_DOUT,
211         PMUX_DRVGRP_DAP2_FS,
212         PMUX_DRVGRP_DAP2_SCLK,
213         PMUX_DRVGRP_DAP4_DIN,
214         PMUX_DRVGRP_DAP4_DOUT,
215         PMUX_DRVGRP_DAP4_FS,
216         PMUX_DRVGRP_DAP4_SCLK,
217         PMUX_DRVGRP_DMIC1_CLK,
218         PMUX_DRVGRP_DMIC1_DAT,
219         PMUX_DRVGRP_DMIC2_CLK,
220         PMUX_DRVGRP_DMIC2_DAT,
221         PMUX_DRVGRP_DMIC3_CLK,
222         PMUX_DRVGRP_DMIC3_DAT,
223         PMUX_DRVGRP_DP_HPD0,
224         PMUX_DRVGRP_DVFS_CLK,
225         PMUX_DRVGRP_DVFS_PWM,
226         PMUX_DRVGRP_GEN1_I2C_SCL,
227         PMUX_DRVGRP_GEN1_I2C_SDA,
228         PMUX_DRVGRP_GEN2_I2C_SCL,
229         PMUX_DRVGRP_GEN2_I2C_SDA,
230         PMUX_DRVGRP_GEN3_I2C_SCL,
231         PMUX_DRVGRP_GEN3_I2C_SDA,
232         PMUX_DRVGRP_PA6,
233         PMUX_DRVGRP_PCC7,
234         PMUX_DRVGRP_PE6,
235         PMUX_DRVGRP_PE7,
236         PMUX_DRVGRP_PH6,
237         PMUX_DRVGRP_PK0,
238         PMUX_DRVGRP_PK1,
239         PMUX_DRVGRP_PK2,
240         PMUX_DRVGRP_PK3,
241         PMUX_DRVGRP_PK4,
242         PMUX_DRVGRP_PK5,
243         PMUX_DRVGRP_PK6,
244         PMUX_DRVGRP_PK7,
245         PMUX_DRVGRP_PL0,
246         PMUX_DRVGRP_PL1,
247         PMUX_DRVGRP_PZ0,
248         PMUX_DRVGRP_PZ1,
249         PMUX_DRVGRP_PZ2,
250         PMUX_DRVGRP_PZ3,
251         PMUX_DRVGRP_PZ4,
252         PMUX_DRVGRP_PZ5,
253         PMUX_DRVGRP_GPIO_X1_AUD,
254         PMUX_DRVGRP_GPIO_X3_AUD,
255         PMUX_DRVGRP_GPS_EN,
256         PMUX_DRVGRP_GPS_RST,
257         PMUX_DRVGRP_HDMI_CEC,
258         PMUX_DRVGRP_HDMI_INT_DP_HPD,
259         PMUX_DRVGRP_JTAG_RTCK,
260         PMUX_DRVGRP_LCD_BL_EN,
261         PMUX_DRVGRP_LCD_BL_PWM,
262         PMUX_DRVGRP_LCD_GPIO1,
263         PMUX_DRVGRP_LCD_GPIO2,
264         PMUX_DRVGRP_LCD_RST,
265         PMUX_DRVGRP_LCD_TE,
266         PMUX_DRVGRP_MODEM_WAKE_AP,
267         PMUX_DRVGRP_MOTION_INT,
268         PMUX_DRVGRP_NFC_EN,
269         PMUX_DRVGRP_NFC_INT,
270         PMUX_DRVGRP_PEX_L0_CLKREQ_N,
271         PMUX_DRVGRP_PEX_L0_RST_N,
272         PMUX_DRVGRP_PEX_L1_CLKREQ_N,
273         PMUX_DRVGRP_PEX_L1_RST_N,
274         PMUX_DRVGRP_PEX_WAKE_N,
275         PMUX_DRVGRP_PWR_I2C_SCL,
276         PMUX_DRVGRP_PWR_I2C_SDA,
277         PMUX_DRVGRP_PWR_INT_N,
278         PMUX_DRVGRP_QSPI_SCK = (0x1bc / 4),
279         PMUX_DRVGRP_SATA_LED_ACTIVE,
280         PMUX_DRVGRP_SDMMC1,
281         PMUX_DRVGRP_SDMMC2,
282         PMUX_DRVGRP_SDMMC3 = (0x1dc / 4),
283         PMUX_DRVGRP_SDMMC4,
284         PMUX_DRVGRP_SHUTDOWN = (0x1f4 / 4),
285         PMUX_DRVGRP_SPDIF_IN,
286         PMUX_DRVGRP_SPDIF_OUT,
287         PMUX_DRVGRP_SPI1_CS0,
288         PMUX_DRVGRP_SPI1_CS1,
289         PMUX_DRVGRP_SPI1_MISO,
290         PMUX_DRVGRP_SPI1_MOSI,
291         PMUX_DRVGRP_SPI1_SCK,
292         PMUX_DRVGRP_SPI2_CS0,
293         PMUX_DRVGRP_SPI2_CS1,
294         PMUX_DRVGRP_SPI2_MISO,
295         PMUX_DRVGRP_SPI2_MOSI,
296         PMUX_DRVGRP_SPI2_SCK,
297         PMUX_DRVGRP_SPI4_CS0,
298         PMUX_DRVGRP_SPI4_MISO,
299         PMUX_DRVGRP_SPI4_MOSI,
300         PMUX_DRVGRP_SPI4_SCK,
301         PMUX_DRVGRP_TEMP_ALERT,
302         PMUX_DRVGRP_TOUCH_CLK,
303         PMUX_DRVGRP_TOUCH_INT,
304         PMUX_DRVGRP_TOUCH_RST,
305         PMUX_DRVGRP_UART1_CTS,
306         PMUX_DRVGRP_UART1_RTS,
307         PMUX_DRVGRP_UART1_RX,
308         PMUX_DRVGRP_UART1_TX,
309         PMUX_DRVGRP_UART2_CTS,
310         PMUX_DRVGRP_UART2_RTS,
311         PMUX_DRVGRP_UART2_RX,
312         PMUX_DRVGRP_UART2_TX,
313         PMUX_DRVGRP_UART3_CTS,
314         PMUX_DRVGRP_UART3_RTS,
315         PMUX_DRVGRP_UART3_RX,
316         PMUX_DRVGRP_UART3_TX,
317         PMUX_DRVGRP_UART4_CTS,
318         PMUX_DRVGRP_UART4_RTS,
319         PMUX_DRVGRP_UART4_RX,
320         PMUX_DRVGRP_UART4_TX,
321         PMUX_DRVGRP_USB_VBUS_EN0,
322         PMUX_DRVGRP_USB_VBUS_EN1,
323         PMUX_DRVGRP_WIFI_EN,
324         PMUX_DRVGRP_WIFI_RST,
325         PMUX_DRVGRP_WIFI_WAKE_AP,
326         PMUX_DRVGRP_COUNT,
327 };
328
329 enum pmux_func {
330         PMUX_FUNC_DEFAULT,
331         PMUX_FUNC_AUD,
332         PMUX_FUNC_BCL,
333         PMUX_FUNC_BLINK,
334         PMUX_FUNC_CCLA,
335         PMUX_FUNC_CEC,
336         PMUX_FUNC_CLDVFS,
337         PMUX_FUNC_CLK,
338         PMUX_FUNC_CORE,
339         PMUX_FUNC_CPU,
340         PMUX_FUNC_DISPLAYA,
341         PMUX_FUNC_DISPLAYB,
342         PMUX_FUNC_DMIC1,
343         PMUX_FUNC_DMIC2,
344         PMUX_FUNC_DMIC3,
345         PMUX_FUNC_DP,
346         PMUX_FUNC_DTV,
347         PMUX_FUNC_EXTPERIPH3,
348         PMUX_FUNC_I2C1,
349         PMUX_FUNC_I2C2,
350         PMUX_FUNC_I2C3,
351         PMUX_FUNC_I2CPMU,
352         PMUX_FUNC_I2CVI,
353         PMUX_FUNC_I2S1,
354         PMUX_FUNC_I2S2,
355         PMUX_FUNC_I2S3,
356         PMUX_FUNC_I2S4A,
357         PMUX_FUNC_I2S4B,
358         PMUX_FUNC_I2S5A,
359         PMUX_FUNC_I2S5B,
360         PMUX_FUNC_IQC0,
361         PMUX_FUNC_IQC1,
362         PMUX_FUNC_JTAG,
363         PMUX_FUNC_PE,
364         PMUX_FUNC_PE0,
365         PMUX_FUNC_PE1,
366         PMUX_FUNC_PMI,
367         PMUX_FUNC_PWM0,
368         PMUX_FUNC_PWM1,
369         PMUX_FUNC_PWM2,
370         PMUX_FUNC_PWM3,
371         PMUX_FUNC_QSPI,
372         PMUX_FUNC_SATA,
373         PMUX_FUNC_SDMMC1,
374         PMUX_FUNC_SDMMC3,
375         PMUX_FUNC_SHUTDOWN,
376         PMUX_FUNC_SOC,
377         PMUX_FUNC_SOR0,
378         PMUX_FUNC_SOR1,
379         PMUX_FUNC_SPDIF,
380         PMUX_FUNC_SPI1,
381         PMUX_FUNC_SPI2,
382         PMUX_FUNC_SPI3,
383         PMUX_FUNC_SPI4,
384         PMUX_FUNC_SYS,
385         PMUX_FUNC_TOUCH,
386         PMUX_FUNC_UART,
387         PMUX_FUNC_UARTA,
388         PMUX_FUNC_UARTB,
389         PMUX_FUNC_UARTC,
390         PMUX_FUNC_UARTD,
391         PMUX_FUNC_USB,
392         PMUX_FUNC_VGP1,
393         PMUX_FUNC_VGP2,
394         PMUX_FUNC_VGP3,
395         PMUX_FUNC_VGP4,
396         PMUX_FUNC_VGP5,
397         PMUX_FUNC_VGP6,
398         PMUX_FUNC_VIMCLK,
399         PMUX_FUNC_VIMCLK2,
400         PMUX_FUNC_RSVD0,
401         PMUX_FUNC_RSVD1,
402         PMUX_FUNC_RSVD2,
403         PMUX_FUNC_RSVD3,
404         PMUX_FUNC_COUNT,
405 };
406
407 #define TEGRA_PMX_SOC_DRV_GROUP_BASE_REG 0x8d4
408 #define TEGRA_PMX_SOC_HAS_IO_CLAMPING
409 #define TEGRA_PMX_SOC_HAS_DRVGRPS
410 #define TEGRA_PMX_PINS_HAVE_E_INPUT
411 #define TEGRA_PMX_PINS_HAVE_LOCK
412 #define TEGRA_PMX_PINS_HAVE_OD
413 #define TEGRA_PMX_PINS_HAVE_E_IO_HV
414 #include <asm/arch-tegra/pinmux.h>
415
416 #endif /* _TEGRA210_PINMUX_H_ */