2 * (C) Copyright 2010,2011
3 * NVIDIA Corporation <www.nvidia.com>
5 * SPDX-License-Identifier: GPL-2.0+
8 #ifndef _TEGRA20_PINMUX_H_
9 #define _TEGRA20_PINMUX_H_
12 * Pin groups which we adjust. There are three basic attributes of each pin
13 * group which use this enum:
17 * - tristate or normal
20 /* APB_MISC_PP_TRISTATE_REG_A_0 */
57 /* 32: APB_MISC_PP_TRISTATE_REG_B_0 */
61 PMUX_PINGRP_RESERVED0,
85 PMUX_PINGRP_RESERVED1,
88 PMUX_PINGRP_RESERVED2,
89 PMUX_PINGRP_RESERVED3,
94 /* 64: APB_MISC_PP_TRISTATE_REG_C_0 */
131 /* 96: APB_MISC_PP_TRISTATE_REG_D_0 */
142 PMUX_PINGRP_RESERVED4,
150 /* these pin groups only have pullup and pull down control */
164 * Functions which can be assigned to each of the pin groups. The values here
165 * bear no relation to the values programmed into pinmux registers and are
166 * purely a convenience. The translation is done through a table search.
171 PMUX_FUNC_AUDIO_SYNC,
180 PMUX_FUNC_EMC_TEST0_DLL,
181 PMUX_FUNC_EMC_TEST1_DLL,
226 PMUX_FUNC_VI_SENSOR_CLK,
235 #include <asm/arch-tegra/pinmux.h>
237 #endif /* _TEGRA20_PINMUX_H_ */