2 * Copyright (c) 2011, Google Inc. All rights reserved.
3 * See file CREDITS for list of people who contributed to this
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License as
8 * published by the Free Software Foundation; either version 2 of
9 * the License, or (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
22 #ifndef _TEGRA2_GPIO_H_
23 #define _TEGRA2_GPIO_H_
26 * The Tegra 2x GPIO controller has 222 GPIOs arranged in 8 banks of 4 ports,
29 #define TEGRA_GPIO_PORTS 4 /* The number of ports per bank */
30 #define TEGRA_GPIO_BANKS 8 /* The number of banks */
32 /* GPIO Controller registers for a single bank */
33 struct gpio_ctlr_bank {
34 uint gpio_config[TEGRA_GPIO_PORTS];
35 uint gpio_dir_out[TEGRA_GPIO_PORTS];
36 uint gpio_out[TEGRA_GPIO_PORTS];
37 uint gpio_in[TEGRA_GPIO_PORTS];
38 uint gpio_int_status[TEGRA_GPIO_PORTS];
39 uint gpio_int_enable[TEGRA_GPIO_PORTS];
40 uint gpio_int_level[TEGRA_GPIO_PORTS];
41 uint gpio_int_clear[TEGRA_GPIO_PORTS];
45 struct gpio_ctlr_bank gpio_bank[TEGRA_GPIO_BANKS];
48 #define GPIO_BANK(x) ((x) >> 5)
49 #define GPIO_PORT(x) (((x) >> 3) & 0x3)
50 #define GPIO_BIT(x) ((x) & 0x7)
53 * GPIO_PI3 = Port I = 8, bit = 3.
54 * Seaboard: used for UART/SPI selection
57 #define GPIO_PI3 ((8 << 3) | 3)
59 #endif /* TEGRA2_GPIO_H_ */