Merge tag 'efi-2020-07-rc6' of https://gitlab.denx.de/u-boot/custodians/u-boot-efi
[oweals/u-boot.git] / arch / arm / include / asm / arch-tegra114 / clock-tables.h
1 /* SPDX-License-Identifier: GPL-2.0 */
2 /*
3  * Copyright (c) 2010-2013, NVIDIA CORPORATION.  All rights reserved.
4  */
5
6 /* Tegra114 clock PLL tables */
7
8 #ifndef _TEGRA114_CLOCK_TABLES_H_
9 #define _TEGRA114_CLOCK_TABLES_H_
10
11 /* The PLLs supported by the hardware */
12 enum clock_id {
13         CLOCK_ID_FIRST,
14         CLOCK_ID_CGENERAL = CLOCK_ID_FIRST,
15         CLOCK_ID_MEMORY,
16         CLOCK_ID_PERIPH,
17         CLOCK_ID_AUDIO,
18         CLOCK_ID_USB,
19         CLOCK_ID_DISPLAY,
20
21         /* now the simple ones */
22         CLOCK_ID_FIRST_SIMPLE,
23         CLOCK_ID_XCPU = CLOCK_ID_FIRST_SIMPLE,
24         CLOCK_ID_EPCI,
25         CLOCK_ID_SFROM32KHZ,
26
27         /* These are the base clocks (inputs to the Tegra SOC) */
28         CLOCK_ID_32KHZ,
29         CLOCK_ID_OSC,
30         CLOCK_ID_CLK_M,
31
32         CLOCK_ID_COUNT, /* number of PLLs */
33         CLOCK_ID_DISPLAY2,      /* placeholder */
34         CLOCK_ID_NONE = -1,
35 };
36
37 /* The clocks supported by the hardware */
38 enum periph_id {
39         PERIPH_ID_FIRST,
40
41         /* Low word: 31:0 (DEVICES_L) */
42         PERIPH_ID_CPU = PERIPH_ID_FIRST,
43         PERIPH_ID_COP,
44         PERIPH_ID_TRIGSYS,
45         PERIPH_ID_RESERVED3,
46         PERIPH_ID_RTC,
47         PERIPH_ID_TMR,
48         PERIPH_ID_UART1,
49         PERIPH_ID_UART2,
50
51         /* 8 */
52         PERIPH_ID_GPIO,
53         PERIPH_ID_SDMMC2,
54         PERIPH_ID_SPDIF,
55         PERIPH_ID_I2S1,
56         PERIPH_ID_I2C1,
57         PERIPH_ID_NDFLASH,
58         PERIPH_ID_SDMMC1,
59         PERIPH_ID_SDMMC4,
60
61         /* 16 */
62         PERIPH_ID_RESERVED16,
63         PERIPH_ID_PWM,
64         PERIPH_ID_I2S2,
65         PERIPH_ID_EPP,
66         PERIPH_ID_VI,
67         PERIPH_ID_2D,
68         PERIPH_ID_USBD,
69         PERIPH_ID_ISP,
70
71         /* 24 */
72         PERIPH_ID_3D,
73         PERIPH_ID_RESERVED24,
74         PERIPH_ID_DISP2,
75         PERIPH_ID_DISP1,
76         PERIPH_ID_HOST1X,
77         PERIPH_ID_VCP,
78         PERIPH_ID_I2S0,
79         PERIPH_ID_CACHE2,
80
81         /* Middle word: 63:32 (DEVICES_H) */
82         PERIPH_ID_MEM,
83         PERIPH_ID_AHBDMA,
84         PERIPH_ID_APBDMA,
85         PERIPH_ID_RESERVED35,
86         PERIPH_ID_KBC,
87         PERIPH_ID_STAT_MON,
88         PERIPH_ID_PMC,
89         PERIPH_ID_FUSE,
90
91         /* 40 */
92         PERIPH_ID_KFUSE,
93         PERIPH_ID_SBC1,
94         PERIPH_ID_SNOR,
95         PERIPH_ID_RESERVED43,
96         PERIPH_ID_SBC2,
97         PERIPH_ID_RESERVED45,
98         PERIPH_ID_SBC3,
99         PERIPH_ID_I2C5,
100
101         /* 48 */
102         PERIPH_ID_DSI,
103         PERIPH_ID_TVO,
104         PERIPH_ID_MIPI,
105         PERIPH_ID_HDMI,
106         PERIPH_ID_CSI,
107         PERIPH_ID_TVDAC,
108         PERIPH_ID_I2C2,
109         PERIPH_ID_UART3,
110
111         /* 56 */
112         PERIPH_ID_RESERVED56,
113         PERIPH_ID_EMC,
114         PERIPH_ID_USB2,
115         PERIPH_ID_USB3,
116         PERIPH_ID_MPE,
117         PERIPH_ID_VDE,
118         PERIPH_ID_BSEA,
119         PERIPH_ID_BSEV,
120
121         /* Upper word 95:64 (DEVICES_U) */
122         PERIPH_ID_SPEEDO,
123         PERIPH_ID_UART4,
124         PERIPH_ID_UART5,
125         PERIPH_ID_I2C3,
126         PERIPH_ID_SBC4,
127         PERIPH_ID_SDMMC3,
128         PERIPH_ID_PCIE,
129         PERIPH_ID_OWR,
130
131         /* 72 */
132         PERIPH_ID_AFI,
133         PERIPH_ID_CORESIGHT,
134         PERIPH_ID_PCIEXCLK,
135         PERIPH_ID_AVPUCQ,
136         PERIPH_ID_RESERVED76,
137         PERIPH_ID_RESERVED77,
138         PERIPH_ID_RESERVED78,
139         PERIPH_ID_DTV,
140
141         /* 80 */
142         PERIPH_ID_NANDSPEED,
143         PERIPH_ID_I2CSLOW,
144         PERIPH_ID_DSIB,
145         PERIPH_ID_RESERVED83,
146         PERIPH_ID_IRAMA,
147         PERIPH_ID_IRAMB,
148         PERIPH_ID_IRAMC,
149         PERIPH_ID_IRAMD,
150
151         /* 88 */
152         PERIPH_ID_CRAM2,
153         PERIPH_ID_RESERVED89,
154         PERIPH_ID_MDOUBLER,
155         PERIPH_ID_RESERVED91,
156         PERIPH_ID_SUSOUT,
157         PERIPH_ID_RESERVED93,
158         PERIPH_ID_RESERVED94,
159         PERIPH_ID_RESERVED95,
160
161         PERIPH_ID_VW_FIRST,
162         /* V word: 31:0 */
163         PERIPH_ID_CPUG = PERIPH_ID_VW_FIRST,
164         PERIPH_ID_CPULP,
165         PERIPH_ID_3D2,
166         PERIPH_ID_MSELECT,
167         PERIPH_ID_TSENSOR,
168         PERIPH_ID_I2S3,
169         PERIPH_ID_I2S4,
170         PERIPH_ID_I2C4,
171
172         /* 104 */
173         PERIPH_ID_SBC5,
174         PERIPH_ID_SBC6,
175         PERIPH_ID_AUDIO,
176         PERIPH_ID_APBIF,
177         PERIPH_ID_DAM0,
178         PERIPH_ID_DAM1,
179         PERIPH_ID_DAM2,
180         PERIPH_ID_HDA2CODEC2X,
181
182         /* 112 */
183         PERIPH_ID_ATOMICS,
184         PERIPH_ID_EX_RESERVED17,
185         PERIPH_ID_EX_RESERVED18,
186         PERIPH_ID_EX_RESERVED19,
187         PERIPH_ID_EX_RESERVED20,
188         PERIPH_ID_EX_RESERVED21,
189         PERIPH_ID_EX_RESERVED22,
190         PERIPH_ID_ACTMON,
191
192         /* 120 */
193         PERIPH_ID_EX_RESERVED24,
194         PERIPH_ID_EX_RESERVED25,
195         PERIPH_ID_EX_RESERVED26,
196         PERIPH_ID_EX_RESERVED27,
197         PERIPH_ID_SATA,
198         PERIPH_ID_HDA,
199         PERIPH_ID_EX_RESERVED30,
200         PERIPH_ID_EX_RESERVED31,
201
202         /* W word: 31:0 */
203         PERIPH_ID_HDA2HDMICODEC,
204         PERIPH_ID_RESERVED1_SATACOLD,
205         PERIPH_ID_RESERVED2_PCIERX0,
206         PERIPH_ID_RESERVED3_PCIERX1,
207         PERIPH_ID_RESERVED4_PCIERX2,
208         PERIPH_ID_RESERVED5_PCIERX3,
209         PERIPH_ID_RESERVED6_PCIERX4,
210         PERIPH_ID_RESERVED7_PCIERX5,
211
212         /* 136 */
213         PERIPH_ID_CEC,
214         PERIPH_ID_PCIE2_IOBIST,
215         PERIPH_ID_EMC_IOBIST,
216         PERIPH_ID_HDMI_IOBIST,
217         PERIPH_ID_SATA_IOBIST,
218         PERIPH_ID_MIPI_IOBIST,
219         PERIPH_ID_EMC1_IOBIST,
220         PERIPH_ID_XUSB,
221
222         /* 144 */
223         PERIPH_ID_CILAB,
224         PERIPH_ID_CILCD,
225         PERIPH_ID_CILE,
226         PERIPH_ID_DSIA_LP,
227         PERIPH_ID_DSIB_LP,
228         PERIPH_ID_RESERVED21_ENTROPY,
229         PERIPH_ID_RESERVED22_W,
230         PERIPH_ID_RESERVED23_W,
231
232         /* 152 */
233         PERIPH_ID_RESERVED24_W,
234         PERIPH_ID_AMX0,
235         PERIPH_ID_ADX0,
236         PERIPH_ID_DVFS,
237         PERIPH_ID_XUSB_SS,
238         PERIPH_ID_EMC_DLL,
239         PERIPH_ID_MC1,
240         PERIPH_ID_EMC1,
241
242         PERIPH_ID_COUNT,
243         PERIPH_ID_NONE = -1,
244 };
245
246 enum pll_out_id {
247         PLL_OUT1,
248         PLL_OUT2,
249         PLL_OUT3,
250         PLL_OUT4
251 };
252
253 /*
254  * Clock peripheral IDs which sadly don't match up with PERIPH_ID. we want
255  * callers to use the PERIPH_ID for all access to peripheral clocks to avoid
256  * confusion bewteen PERIPH_ID_... and PERIPHC_...
257  *
258  * We don't call this CLOCK_PERIPH_ID or PERIPH_CLOCK_ID as it would just be
259  * confusing.
260  */
261 enum periphc_internal_id {
262         /* 0x00 */
263         PERIPHC_I2S1,
264         PERIPHC_I2S2,
265         PERIPHC_SPDIF_OUT,
266         PERIPHC_SPDIF_IN,
267         PERIPHC_PWM,
268         PERIPHC_05h,
269         PERIPHC_SBC2,
270         PERIPHC_SBC3,
271
272         /* 0x08 */
273         PERIPHC_08h,
274         PERIPHC_I2C1,
275         PERIPHC_I2C5,
276         PERIPHC_0bh,
277         PERIPHC_0ch,
278         PERIPHC_SBC1,
279         PERIPHC_DISP1,
280         PERIPHC_DISP2,
281
282         /* 0x10 */
283         PERIPHC_CVE,
284         PERIPHC_11h,
285         PERIPHC_VI,
286         PERIPHC_13h,
287         PERIPHC_SDMMC1,
288         PERIPHC_SDMMC2,
289         PERIPHC_G3D,
290         PERIPHC_G2D,
291
292         /* 0x18 */
293         PERIPHC_NDFLASH,
294         PERIPHC_SDMMC4,
295         PERIPHC_VFIR,
296         PERIPHC_EPP,
297         PERIPHC_MPE,
298         PERIPHC_MIPI,
299         PERIPHC_UART1,
300         PERIPHC_UART2,
301
302         /* 0x20 */
303         PERIPHC_HOST1X,
304         PERIPHC_21h,
305         PERIPHC_TVO,
306         PERIPHC_HDMI,
307         PERIPHC_24h,
308         PERIPHC_TVDAC,
309         PERIPHC_I2C2,
310         PERIPHC_EMC,
311
312         /* 0x28 */
313         PERIPHC_UART3,
314         PERIPHC_29h,
315         PERIPHC_VI_SENSOR,
316         PERIPHC_2bh,
317         PERIPHC_2ch,
318         PERIPHC_SBC4,
319         PERIPHC_I2C3,
320         PERIPHC_SDMMC3,
321
322         /* 0x30 */
323         PERIPHC_UART4,
324         PERIPHC_UART5,
325         PERIPHC_VDE,
326         PERIPHC_OWR,
327         PERIPHC_NOR,
328         PERIPHC_CSITE,
329         PERIPHC_I2S0,
330         PERIPHC_37h,
331
332         PERIPHC_VW_FIRST,
333         /* 0x38 */
334         PERIPHC_G3D2 = PERIPHC_VW_FIRST,
335         PERIPHC_MSELECT,
336         PERIPHC_TSENSOR,
337         PERIPHC_I2S3,
338         PERIPHC_I2S4,
339         PERIPHC_I2C4,
340         PERIPHC_SBC5,
341         PERIPHC_SBC6,
342
343         /* 0x40 */
344         PERIPHC_AUDIO,
345         PERIPHC_41h,
346         PERIPHC_DAM0,
347         PERIPHC_DAM1,
348         PERIPHC_DAM2,
349         PERIPHC_HDA2CODEC2X,
350         PERIPHC_ACTMON,
351         PERIPHC_EXTPERIPH1,
352
353         /* 0x48 */
354         PERIPHC_EXTPERIPH2,
355         PERIPHC_EXTPERIPH3,
356         PERIPHC_NANDSPEED,
357         PERIPHC_I2CSLOW,
358         PERIPHC_SYS,
359         PERIPHC_SPEEDO,
360         PERIPHC_4eh,
361         PERIPHC_4fh,
362
363         /* 0x50 */
364         PERIPHC_50h,
365         PERIPHC_51h,
366         PERIPHC_52h,
367         PERIPHC_53h,
368         PERIPHC_SATAOOB,
369         PERIPHC_SATA,
370         PERIPHC_HDA,
371
372         PERIPHC_COUNT,
373
374         PERIPHC_NONE = -1,
375 };
376
377 /* Converts a clock number to a clock register: 0=L, 1=H, 2=U, 0=V, 1=W */
378 #define PERIPH_REG(id) \
379         (id < PERIPH_ID_VW_FIRST) ? \
380                 ((id) >> 5) : ((id - PERIPH_ID_VW_FIRST) >> 5)
381
382 /* Mask value for a clock (within PERIPH_REG(id)) */
383 #define PERIPH_MASK(id) (1 << ((id) & 0x1f))
384
385 /* return 1 if a PLL ID is in range */
386 #define clock_id_is_pll(id) ((id) >= CLOCK_ID_FIRST && (id) < CLOCK_ID_COUNT)
387
388 /* return 1 if a peripheral ID is in range */
389 #define clock_periph_id_isvalid(id) ((id) >= PERIPH_ID_FIRST && \
390                 (id) < PERIPH_ID_COUNT)
391
392 #endif  /* _TEGRA114_CLOCK_TABLES_H_ */