2 * Copyright (C) 2013 Altera Corporation <www.altera.com>
4 * SPDX-License-Identifier: GPL-2.0+
7 #ifndef _SYSTEM_MANAGER_H_
8 #define _SYSTEM_MANAGER_H_
12 void sysmgr_pinmux_init(void);
14 /* declaration for handoff table type */
15 extern unsigned long sys_mgr_init_table[CONFIG_HPS_PINMUX_NUM];
20 #define CONFIG_SYSMGR_PINMUXGRP_OFFSET (0x400)
22 #define SYSMGR_SDMMC_CTRL_SET(smplsel, drvsel) \
23 ((((drvsel) << 0) & 0x7) | (((smplsel) << 3) & 0x38))
25 struct socfpga_system_manager {
34 u32 fpgaintfgrp_indiv;
35 u32 fpgaintfgrp_module;
38 u32 _pad_0x34_0x3f[3];
40 u32 _pad_0x44_0x4f[3];
47 u32 _pad_0x68_0x6f[2];
49 u32 dmagrp_persecurity;
50 u32 _pad_0x78_0x7f[2];
51 u32 iswgrp_handoff[8];
52 u32 _pad_0xa0_0xbf[8];
54 u32 romcodegrp_cpu1startaddr;
55 u32 romcodegrp_initswstate;
56 u32 romcodegrp_initswlastld;
57 u32 romcodegrp_bootromswstate;
58 u32 __pad_0xd4_0xdf[3];
59 u32 romcodegrp_warmramgrp_enable;
60 u32 romcodegrp_warmramgrp_datastart;
61 u32 romcodegrp_warmramgrp_length;
62 u32 romcodegrp_warmramgrp_execution;
63 u32 romcodegrp_warmramgrp_crc;
64 u32 __pad_0xf4_0xff[3];
68 u32 sdmmcgrp_l3master;
69 u32 nandgrp_bootstrap;
72 u32 _pad_0x11c_0x13f[9];
87 #endif /* _SYSTEM_MANAGER_H_ */