1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * (C) Copyright 2015 Rockchip Electronics Co., Ltd
5 #ifndef _ASM_ARCH_SDRAM_RK3036_H
6 #define _ASM_ARCH_SDRAM_RK3036_H
10 struct rk3036_ddr_pctl {
117 u32 dfitrrdlvlgateen;
136 u32 dfitrwrlvldelay0;
137 u32 dfitrwrlvldelay1;
138 u32 dfitrwrlvldelay2;
139 u32 dfitrrdlvldelay0;
140 u32 dfitrrdlvldelay1;
141 u32 dfitrrdlvldelay2;
142 u32 dfitrrdlvlgatedelay0;
143 u32 dfitrrdlvlgatedelay1;
144 u32 dfitrrdlvlgatedelay2;
150 check_member(rk3036_ddr_pctl, iptr, 0x03fc);
152 struct rk3036_ddr_phy {
235 check_member(rk3036_ddr_phy, ddrphy_reg62, 0x03e8);
237 struct rk3036_pctl_timing {
274 struct rk3036_phy_timing {
293 struct rk3036_ddr_timing {
295 struct rk3036_pctl_timing pctl_timing;
296 struct rk3036_phy_timing phy_timing;
297 rk3036_noc_timing noc_timing;
300 struct rk3036_service_sys {
309 struct rk3036_ddr_config {
324 /* 2: 4bank, 3: 8bank */
328 /* bw(0: 8bit, 1: 16bit, 2: 32bit) */
332 /* rk3036 sdram initial */
333 void sdram_init(void);
335 /* get ddr die config, implement in specific board */
336 void get_ddr_config(struct rk3036_ddr_config *config);
338 /* get ddr size on board */
339 size_t sdram_size(void);