1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * Copyright (C) 2017 Rockchip Electronics Co., Ltd.
6 #ifndef _ASM_ARCH_SDRAM_COMMON_H
7 #define _ASM_ARCH_SDRAM_COMMON_H
18 struct sdram_cap_info {
20 /* dram column number, 0 means this channel is invalid */
22 /* dram bank number, 3:8bank, 2:4bank */
24 /* channel buswidth, 2:32bit, 1:16bit, 0:8bit */
26 /* die buswidth, 2:32bit, 1:16bit, 0:8bit */
29 * row_3_4 = 1: 6Gb or 12Gb die
30 * row_3_4 = 0: normal die, power of 2
35 unsigned int ddrconfig;
38 struct sdram_base_params {
39 unsigned int ddr_freq;
40 unsigned int dramtype;
41 unsigned int num_channels;
47 * sys_reg bitfield struct
68 #define SYS_REG_DDRTYPE_SHIFT 13
69 #define SYS_REG_DDRTYPE_MASK 7
70 #define SYS_REG_NUM_CH_SHIFT 12
71 #define SYS_REG_NUM_CH_MASK 1
72 #define SYS_REG_ROW_3_4_SHIFT(ch) (30 + (ch))
73 #define SYS_REG_ROW_3_4_MASK 1
74 #define SYS_REG_CHINFO_SHIFT(ch) (28 + (ch))
75 #define SYS_REG_RANK_SHIFT(ch) (11 + (ch) * 16)
76 #define SYS_REG_RANK_MASK 1
77 #define SYS_REG_COL_SHIFT(ch) (9 + (ch) * 16)
78 #define SYS_REG_COL_MASK 3
79 #define SYS_REG_BK_SHIFT(ch) (8 + (ch) * 16)
80 #define SYS_REG_BK_MASK 1
81 #define SYS_REG_CS0_ROW_SHIFT(ch) (6 + (ch) * 16)
82 #define SYS_REG_CS0_ROW_MASK 3
83 #define SYS_REG_CS1_ROW_SHIFT(ch) (4 + (ch) * 16)
84 #define SYS_REG_CS1_ROW_MASK 3
85 #define SYS_REG_BW_SHIFT(ch) (2 + (ch) * 16)
86 #define SYS_REG_BW_MASK 3
87 #define SYS_REG_DBW_SHIFT(ch) ((ch) * 16)
88 #define SYS_REG_DBW_MASK 3
90 /* Get sdram size decode from reg */
91 size_t rockchip_sdram_size(phys_addr_t reg);
93 /* Called by U-Boot board_init_r for Rockchip SoCs */
96 #if !defined(CONFIG_RAM_ROCKCHIP_DEBUG)
97 inline void sdram_print_dram_type(unsigned char dramtype)
101 inline void sdram_print_ddr_info(struct sdram_cap_info *cap_info,
102 struct sdram_base_params *base)
106 inline void sdram_print_stride(unsigned int stride)
110 void sdram_print_dram_type(unsigned char dramtype);
111 void sdram_print_ddr_info(struct sdram_cap_info *cap_info,
112 struct sdram_base_params *base);
113 void sdram_print_stride(unsigned int stride);
114 #endif /* CONFIG_RAM_ROCKCHIP_DEBUG */