1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * (C) Copyright 2016 Rockchip Electronics Co., Ltd
4 * (C) Copyright 2017 Theobroma Systems Design und Consulting GmbH
6 #ifndef _ASM_ARCH_GRF_RK3368_H
7 #define _ASM_ARCH_GRF_RK3368_H
81 check_member(rk3368_grf, soc_con17, 0x444);
82 check_member(rk3368_grf, ddrc0_con0, 0x600);
84 struct rk3368_pmu_grf {
102 check_member(rk3368_pmu_grf, gpio0h_sr, 0x34);
103 check_member(rk3368_pmu_grf, os_reg[0], 0x200);
105 /*GRF_SOC_CON11/12/13*/
107 MCU_SRAM_BASE_BIT27_BIT12_SHIFT = 0,
108 MCU_SRAM_BASE_BIT27_BIT12_MASK = GENMASK(15, 0),
113 MCU_EXSRAM_BASE_BIT27_BIT12_SHIFT = 0,
114 MCU_EXSRAM_BASE_BIT27_BIT12_MASK = GENMASK(15, 0),
119 MCU_EXPERI_BASE_BIT27_BIT12_SHIFT = 0,
120 MCU_EXPERI_BASE_BIT27_BIT12_MASK = GENMASK(15, 0),
125 MCU_EXPERI_BASE_BIT31_BIT28_SHIFT = 12,
126 MCU_EXPERI_BASE_BIT31_BIT28_MASK = GENMASK(15, 12),
127 MCU_EXSRAM_BASE_BIT31_BIT28_SHIFT = 8,
128 MCU_EXSRAM_BASE_BIT31_BIT28_MASK = GENMASK(11, 8),
129 MCU_SRAM_BASE_BIT31_BIT28_SHIFT = 4,
130 MCU_SRAM_BASE_BIT31_BIT28_MASK = GENMASK(7, 4),
131 MCU_CODE_BASE_BIT31_BIT28_SHIFT = 0,
132 MCU_CODE_BASE_BIT31_BIT28_MASK = GENMASK(3, 0),