2 * Copyright (C) 2011 Marek Vasut <marek.vasut@gmail.com>
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License as
6 * published by the Free Software Foundation; either version 2 of
7 * the License, or (at your option) any later version.
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
20 #ifndef __REGS_MMC_H__
21 #define __REGS_MMC_H__
23 #define MMC0_BASE 0x41100000
24 #define MMC1_BASE 0x42000000
26 int pxa_mmc_register(int card_index);
50 #define MMC_STRPCL_STOP_CLK (1 << 0)
51 #define MMC_STRPCL_START_CLK (1 << 1)
54 #define MMC_STAT_END_CMD_RES (1 << 13)
55 #define MMC_STAT_PRG_DONE (1 << 12)
56 #define MMC_STAT_DATA_TRAN_DONE (1 << 11)
57 #define MMC_STAT_CLK_EN (1 << 8)
58 #define MMC_STAT_RECV_FIFO_FULL (1 << 7)
59 #define MMC_STAT_XMIT_FIFO_EMPTY (1 << 6)
60 #define MMC_STAT_RES_CRC_ERROR (1 << 5)
61 #define MMC_STAT_SPI_READ_ERROR_TOKEN (1 << 4)
62 #define MMC_STAT_CRC_READ_ERROR (1 << 3)
63 #define MMC_STAT_CRC_WRITE_ERROR (1 << 2)
64 #define MMC_STAT_TIME_OUT_RESPONSE (1 << 1)
65 #define MMC_STAT_READ_TIME_OUT (1 << 0)
68 #define MMC_CLKRT_20MHZ 0
69 #define MMC_CLKRT_10MHZ 1
70 #define MMC_CLKRT_5MHZ 2
71 #define MMC_CLKRT_2_5MHZ 3
72 #define MMC_CLKRT_1_25MHZ 4
73 #define MMC_CLKRT_0_625MHZ 5
74 #define MMC_CLKRT_0_3125MHZ 6
77 #define MMC_SPI_EN (1 << 0)
78 #define MMC_SPI_CS_EN (1 << 2)
79 #define MMC_SPI_CS_ADDRESS (1 << 3)
80 #define MMC_SPI_CRC_ON (1 << 1)
83 #define MMC_CMDAT_SD_4DAT (1 << 8)
84 #define MMC_CMDAT_MMC_DMA_EN (1 << 7)
85 #define MMC_CMDAT_INIT (1 << 6)
86 #define MMC_CMDAT_BUSY (1 << 5)
87 #define MMC_CMDAT_BCR (MMC_CMDAT_BUSY | MMC_CMDAT_INIT)
88 #define MMC_CMDAT_STREAM (1 << 4)
89 #define MMC_CMDAT_WRITE (1 << 3)
90 #define MMC_CMDAT_DATA_EN (1 << 2)
91 #define MMC_CMDAT_R0 0
92 #define MMC_CMDAT_R1 1
93 #define MMC_CMDAT_R2 2
94 #define MMC_CMDAT_R3 3
97 #define MMC_RES_TO_MAX_MASK 0x7f
100 #define MMC_READ_TO_MAX_MASK 0xffff
103 #define MMC_BLK_LEN_MAX_MASK 0x3ff
106 #define MMC_PRTBUF_BUF_PART_FULL (1 << 0)
109 #define MMC_I_MASK_TXFIFO_WR_REQ (1 << 6)
110 #define MMC_I_MASK_RXFIFO_RD_REQ (1 << 5)
111 #define MMC_I_MASK_CLK_IS_OFF (1 << 4)
112 #define MMC_I_MASK_STOP_CMD (1 << 3)
113 #define MMC_I_MASK_END_CMD_RES (1 << 2)
114 #define MMC_I_MASK_PRG_DONE (1 << 1)
115 #define MMC_I_MASK_DATA_TRAN_DONE (1 << 0)
116 #define MMC_I_MASK_ALL 0x7f
120 #define MMC_I_REG_TXFIFO_WR_REQ (1 << 6)
121 #define MMC_I_REG_RXFIFO_RD_REQ (1 << 5)
122 #define MMC_I_REG_CLK_IS_OFF (1 << 4)
123 #define MMC_I_REG_STOP_CMD (1 << 3)
124 #define MMC_I_REG_END_CMD_RES (1 << 2)
125 #define MMC_I_REG_PRG_DONE (1 << 1)
126 #define MMC_I_REG_DATA_TRAN_DONE (1 << 0)
129 #define MMC_CMD_INDEX_MAX 0x6f
131 #define MMC_R1_IDLE_STATE 0x01
132 #define MMC_R1_ERASE_STATE 0x02
133 #define MMC_R1_ILLEGAL_CMD 0x04
134 #define MMC_R1_COM_CRC_ERR 0x08
135 #define MMC_R1_ERASE_SEQ_ERR 0x01
136 #define MMC_R1_ADDR_ERR 0x02
137 #define MMC_R1_PARAM_ERR 0x04
139 #define MMC_R1B_WP_ERASE_SKIP 0x0002
140 #define MMC_R1B_ERR 0x0004
141 #define MMC_R1B_CC_ERR 0x0008
142 #define MMC_R1B_CARD_ECC_ERR 0x0010
143 #define MMC_R1B_WP_VIOLATION 0x0020
144 #define MMC_R1B_ERASE_PARAM 0x0040
145 #define MMC_R1B_OOR 0x0080
146 #define MMC_R1B_IDLE_STATE 0x0100
147 #define MMC_R1B_ERASE_RESET 0x0200
148 #define MMC_R1B_ILLEGAL_CMD 0x0400
149 #define MMC_R1B_COM_CRC_ERR 0x0800
150 #define MMC_R1B_ERASE_SEQ_ERR 0x1000
151 #define MMC_R1B_ADDR_ERR 0x2000
152 #define MMC_R1B_PARAM_ERR 0x4000
154 #endif /* __REGS_MMC_H__ */