2 * (C) Copyright 2004-2009
3 * Texas Instruments Incorporated
4 * Richard Woodruff <r-woodruff2@ti.com>
5 * Aneesh V <aneesh@ti.com>
6 * Balaji Krishnamoorthy <balajitk@ti.com>
8 * See file CREDITS for list of people who contributed to this
11 * This program is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License as
13 * published by the Free Software Foundation; either version 2 of
14 * the License, or (at your option) any later version.
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
29 #include <asm/types.h>
31 struct pad_conf_entry {
39 #ifdef CONFIG_OFF_PADCONF
40 #define OFF_PD (1 << 12)
41 #define OFF_PU (3 << 12)
42 #define OFF_OUT_PTD (0 << 10)
43 #define OFF_OUT_PTU (2 << 10)
44 #define OFF_IN (1 << 10)
45 #define OFF_OUT (0 << 10)
46 #define OFF_EN (1 << 9)
48 #define OFF_PD (0 << 12)
49 #define OFF_PU (0 << 12)
50 #define OFF_OUT_PTD (0 << 10)
51 #define OFF_OUT_PTU (0 << 10)
52 #define OFF_IN (0 << 10)
53 #define OFF_OUT (0 << 10)
54 #define OFF_EN (0 << 9)
75 #ifdef CONFIG_OFF_PADCONF
76 #define OFF_IN_PD (OFF_PD | OFF_IN | OFF_EN)
77 #define OFF_IN_PU (OFF_PU | OFF_IN | OFF_EN)
78 #define OFF_OUT_PD (OFF_OUT_PTD | OFF_OUT | OFF_EN)
79 #define OFF_OUT_PU (OFF_OUT_PTU | OFF_OUT | OFF_EN)
87 #define CORE_REVISION 0x0000
88 #define CORE_HWINFO 0x0004
89 #define CORE_SYSCONFIG 0x0010
90 #define EMMC_CLK 0x0040
91 #define EMMC_CMD 0x0042
92 #define EMMC_DATA0 0x0044
93 #define EMMC_DATA1 0x0046
94 #define EMMC_DATA2 0x0048
95 #define EMMC_DATA3 0x004a
96 #define EMMC_DATA4 0x004c
97 #define EMMC_DATA5 0x004e
98 #define EMMC_DATA6 0x0050
99 #define EMMC_DATA7 0x0052
100 #define C2C_CLKOUT0 0x0054
101 #define C2C_CLKOUT1 0x0056
102 #define C2C_CLKIN0 0x0058
103 #define C2C_CLKIN1 0x005a
104 #define C2C_DATAIN0 0x005c
105 #define C2C_DATAIN1 0x005e
106 #define C2C_DATAIN2 0x0060
107 #define C2C_DATAIN3 0x0062
108 #define C2C_DATAIN4 0x0064
109 #define C2C_DATAIN5 0x0066
110 #define C2C_DATAIN6 0x0068
111 #define C2C_DATAIN7 0x006a
112 #define C2C_DATAOUT0 0x006c
113 #define C2C_DATAOUT1 0x006e
114 #define C2C_DATAOUT2 0x0070
115 #define C2C_DATAOUT3 0x0072
116 #define C2C_DATAOUT4 0x0074
117 #define C2C_DATAOUT5 0x0076
118 #define C2C_DATAOUT6 0x0078
119 #define C2C_DATAOUT7 0x007a
120 #define C2C_DATA8 0x007c
121 #define C2C_DATA9 0x007e
122 #define C2C_DATA10 0x0080
123 #define C2C_DATA11 0x0082
124 #define C2C_DATA12 0x0084
125 #define C2C_DATA13 0x0086
126 #define C2C_DATA14 0x0088
127 #define C2C_DATA15 0x008a
128 #define LLIA_WAKEREQOUT 0x008c
129 #define LLIB_WAKEREQOUT 0x008e
130 #define HSI1_ACREADY 0x0090
131 #define HSI1_CAREADY 0x0092
132 #define HSI1_ACWAKE 0x0094
133 #define HSI1_CAWAKE 0x0096
134 #define HSI1_ACFLAG 0x0098
135 #define HSI1_ACDATA 0x009a
136 #define HSI1_CAFLAG 0x009c
137 #define HSI1_CADATA 0x009e
138 #define UART1_TX 0x00a0
139 #define UART1_CTS 0x00a2
140 #define UART1_RX 0x00a4
141 #define UART1_RTS 0x00a6
142 #define HSI2_CAREADY 0x00a8
143 #define HSI2_ACREADY 0x00aa
144 #define HSI2_CAWAKE 0x00ac
145 #define HSI2_ACWAKE 0x00ae
146 #define HSI2_CAFLAG 0x00b0
147 #define HSI2_CADATA 0x00b2
148 #define HSI2_ACFLAG 0x00b4
149 #define HSI2_ACDATA 0x00b6
150 #define UART2_RTS 0x00b8
151 #define UART2_CTS 0x00ba
152 #define UART2_RX 0x00bc
153 #define UART2_TX 0x00be
154 #define USBB1_HSIC_STROBE 0x00c0
155 #define USBB1_HSIC_DATA 0x00c2
156 #define USBB2_HSIC_STROBE 0x00c4
157 #define USBB2_HSIC_DATA 0x00c6
158 #define TIMER10_PWM_EVT 0x00c8
159 #define DSIPORTA_TE0 0x00ca
160 #define DSIPORTA_LANE0X 0x00cc
161 #define DSIPORTA_LANE0Y 0x00ce
162 #define DSIPORTA_LANE1X 0x00d0
163 #define DSIPORTA_LANE1Y 0x00d2
164 #define DSIPORTA_LANE2X 0x00d4
165 #define DSIPORTA_LANE2Y 0x00d6
166 #define DSIPORTA_LANE3X 0x00d8
167 #define DSIPORTA_LANE3Y 0x00da
168 #define DSIPORTA_LANE4X 0x00dc
169 #define DSIPORTA_LANE4Y 0x00de
170 #define DSIPORTC_LANE0X 0x00e0
171 #define DSIPORTC_LANE0Y 0x00e2
172 #define DSIPORTC_LANE1X 0x00e4
173 #define DSIPORTC_LANE1Y 0x00e6
174 #define DSIPORTC_LANE2X 0x00e8
175 #define DSIPORTC_LANE2Y 0x00ea
176 #define DSIPORTC_LANE3X 0x00ec
177 #define DSIPORTC_LANE3Y 0x00ee
178 #define DSIPORTC_LANE4X 0x00f0
179 #define DSIPORTC_LANE4Y 0x00f2
180 #define DSIPORTC_TE0 0x00f4
181 #define TIMER9_PWM_EVT 0x00f6
182 #define I2C4_SCL 0x00f8
183 #define I2C4_SDA 0x00fa
184 #define MCSPI2_CLK 0x00fc
185 #define MCSPI2_SIMO 0x00fe
186 #define MCSPI2_SOMI 0x0100
187 #define MCSPI2_CS0 0x0102
188 #define RFBI_DATA15 0x0104
189 #define RFBI_DATA14 0x0106
190 #define RFBI_DATA13 0x0108
191 #define RFBI_DATA12 0x010a
192 #define RFBI_DATA11 0x010c
193 #define RFBI_DATA10 0x010e
194 #define RFBI_DATA9 0x0110
195 #define RFBI_DATA8 0x0112
196 #define RFBI_DATA7 0x0114
197 #define RFBI_DATA6 0x0116
198 #define RFBI_DATA5 0x0118
199 #define RFBI_DATA4 0x011a
200 #define RFBI_DATA3 0x011c
201 #define RFBI_DATA2 0x011e
202 #define RFBI_DATA1 0x0120
203 #define RFBI_DATA0 0x0122
204 #define RFBI_WE 0x0124
205 #define RFBI_CS0 0x0126
206 #define RFBI_A0 0x0128
207 #define RFBI_RE 0x012a
208 #define RFBI_HSYNC0 0x012c
209 #define RFBI_TE_VSYNC0 0x012e
210 #define GPIO6_182 0x0130
211 #define GPIO6_183 0x0132
212 #define GPIO6_184 0x0134
213 #define GPIO6_185 0x0136
214 #define GPIO6_186 0x0138
215 #define GPIO6_187 0x013a
216 #define HDMI_CEC 0x013c
217 #define HDMI_HPD 0x013e
218 #define HDMI_DDC_SCL 0x0140
219 #define HDMI_DDC_SDA 0x0142
220 #define CSIPORTC_LANE0X 0x0144
221 #define CSIPORTC_LANE0Y 0x0146
222 #define CSIPORTC_LANE1X 0x0148
223 #define CSIPORTC_LANE1Y 0x014a
224 #define CSIPORTB_LANE0X 0x014c
225 #define CSIPORTB_LANE0Y 0x014e
226 #define CSIPORTB_LANE1X 0x0150
227 #define CSIPORTB_LANE1Y 0x0152
228 #define CSIPORTB_LANE2X 0x0154
229 #define CSIPORTB_LANE2Y 0x0156
230 #define CSIPORTA_LANE0X 0x0158
231 #define CSIPORTA_LANE0Y 0x015a
232 #define CSIPORTA_LANE1X 0x015c
233 #define CSIPORTA_LANE1Y 0x015e
234 #define CSIPORTA_LANE2X 0x0160
235 #define CSIPORTA_LANE2Y 0x0162
236 #define CSIPORTA_LANE3X 0x0164
237 #define CSIPORTA_LANE3Y 0x0166
238 #define CSIPORTA_LANE4X 0x0168
239 #define CSIPORTA_LANE4Y 0x016a
240 #define CAM_SHUTTER 0x016c
241 #define CAM_STROBE 0x016e
242 #define CAM_GLOBALRESET 0x0170
243 #define TIMER11_PWM_EVT 0x0172
244 #define TIMER5_PWM_EVT 0x0174
245 #define TIMER6_PWM_EVT 0x0176
246 #define TIMER8_PWM_EVT 0x0178
247 #define I2C3_SCL 0x017a
248 #define I2C3_SDA 0x017c
249 #define GPIO8_233 0x017e
250 #define GPIO8_234 0x0180
251 #define ABE_CLKS 0x0182
252 #define ABEDMIC_DIN1 0x0184
253 #define ABEDMIC_DIN2 0x0186
254 #define ABEDMIC_DIN3 0x0188
255 #define ABEDMIC_CLK1 0x018a
256 #define ABEDMIC_CLK2 0x018c
257 #define ABEDMIC_CLK3 0x018e
258 #define ABESLIMBUS1_CLOCK 0x0190
259 #define ABESLIMBUS1_DATA 0x0192
260 #define ABEMCBSP2_DR 0x0194
261 #define ABEMCBSP2_DX 0x0196
262 #define ABEMCBSP2_FSX 0x0198
263 #define ABEMCBSP2_CLKX 0x019a
264 #define ABEMCPDM_UL_DATA 0x019c
265 #define ABEMCPDM_DL_DATA 0x019e
266 #define ABEMCPDM_FRAME 0x01a0
267 #define ABEMCPDM_LB_CLK 0x01a2
268 #define WLSDIO_CLK 0x01a4
269 #define WLSDIO_CMD 0x01a6
270 #define WLSDIO_DATA0 0x01a8
271 #define WLSDIO_DATA1 0x01aa
272 #define WLSDIO_DATA2 0x01ac
273 #define WLSDIO_DATA3 0x01ae
274 #define UART5_RX 0x01b0
275 #define UART5_TX 0x01b2
276 #define UART5_CTS 0x01b4
277 #define UART5_RTS 0x01b6
278 #define I2C2_SCL 0x01b8
279 #define I2C2_SDA 0x01ba
280 #define MCSPI1_CLK 0x01bc
281 #define MCSPI1_SOMI 0x01be
282 #define MCSPI1_SIMO 0x01c0
283 #define MCSPI1_CS0 0x01c2
284 #define MCSPI1_CS1 0x01c4
285 #define I2C5_SCL 0x01c6
286 #define I2C5_SDA 0x01c8
287 #define PERSLIMBUS2_CLOCK 0x01ca
288 #define PERSLIMBUS2_DATA 0x01cc
289 #define UART6_TX 0x01ce
290 #define UART6_RX 0x01d0
291 #define UART6_CTS 0x01d2
292 #define UART6_RTS 0x01d4
293 #define UART3_CTS_RCTX 0x01d6
294 #define UART3_RTS_IRSD 0x01d8
295 #define UART3_TX_IRTX 0x01da
296 #define UART3_RX_IRRX 0x01dc
297 #define USBB3_HSIC_STROBE 0x01de
298 #define USBB3_HSIC_DATA 0x01e0
299 #define SDCARD_CLK 0x01e2
300 #define SDCARD_CMD 0x01e4
301 #define SDCARD_DATA2 0x01e6
302 #define SDCARD_DATA3 0x01e8
303 #define SDCARD_DATA0 0x01ea
304 #define SDCARD_DATA1 0x01ec
305 #define USBD0_HS_DP 0x01ee
306 #define USBD0_HS_DM 0x01f0
307 #define I2C1_PMIC_SCL 0x01f2
308 #define I2C1_PMIC_SDA 0x01f4
309 #define USBD0_SS_RX 0x01f6
311 #define LLIA_WAKEREQIN 0x0040
312 #define LLIB_WAKEREQIN 0x0042
313 #define DRM_EMU0 0x0044
314 #define DRM_EMU1 0x0046
315 #define JTAG_NTRST 0x0048
316 #define JTAG_TCK 0x004a
317 #define JTAG_RTCK 0x004c
318 #define JTAG_TMSC 0x004e
319 #define JTAG_TDI 0x0050
320 #define JTAG_TDO 0x0052
321 #define SYS_32K 0x0054
322 #define FREF_CLK_IOREQ 0x0056
323 #define FREF_CLK0_OUT 0x0058
324 #define FREF_CLK1_OUT 0x005a
325 #define FREF_CLK2_OUT 0x005c
326 #define FREF_CLK2_REQ 0x005e
327 #define FREF_CLK1_REQ 0x0060
328 #define SYS_NRESPWRON 0x0062
329 #define SYS_NRESWARM 0x0064
330 #define SYS_PWR_REQ 0x0066
331 #define SYS_NIRQ1 0x0068
332 #define SYS_NIRQ2 0x006a
333 #define SR_PMIC_SCL 0x006c
334 #define SR_PMIC_SDA 0x006e
335 #define SYS_BOOT0 0x0070
336 #define SYS_BOOT1 0x0072
337 #define SYS_BOOT2 0x0074
338 #define SYS_BOOT3 0x0076
339 #define SYS_BOOT4 0x0078
340 #define SYS_BOOT5 0x007a
342 #endif /* _MUX_OMAP5_H_ */