2 * (C) Copyright 2004-2009
3 * Texas Instruments Incorporated
4 * Richard Woodruff <r-woodruff2@ti.com>
5 * Aneesh V <aneesh@ti.com>
6 * Balaji Krishnamoorthy <balajitk@ti.com>
8 * See file CREDITS for list of people who contributed to this
11 * This program is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License as
13 * published by the Free Software Foundation; either version 2 of
14 * the License, or (at your option) any later version.
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
29 #include <asm/types.h>
31 #ifdef CONFIG_OFF_PADCONF
32 #define OFF_PD (1 << 12)
33 #define OFF_PU (3 << 12)
34 #define OFF_OUT_PTD (0 << 10)
35 #define OFF_OUT_PTU (2 << 10)
36 #define OFF_IN (1 << 10)
37 #define OFF_OUT (0 << 10)
38 #define OFF_EN (1 << 9)
40 #define OFF_PD (0 << 12)
41 #define OFF_PU (0 << 12)
42 #define OFF_OUT_PTD (0 << 10)
43 #define OFF_OUT_PTU (0 << 10)
44 #define OFF_IN (0 << 10)
45 #define OFF_OUT (0 << 10)
46 #define OFF_EN (0 << 9)
67 #ifdef CONFIG_OFF_PADCONF
68 #define OFF_IN_PD (OFF_PD | OFF_IN | OFF_EN)
69 #define OFF_IN_PU (OFF_PU | OFF_IN | OFF_EN)
70 #define OFF_OUT_PD (OFF_OUT_PTD | OFF_OUT | OFF_EN)
71 #define OFF_OUT_PU (OFF_OUT_PTU | OFF_OUT | OFF_EN)
79 #define CORE_REVISION 0x0000
80 #define CORE_HWINFO 0x0004
81 #define CORE_SYSCONFIG 0x0010
82 #define EMMC_CLK 0x0040
83 #define EMMC_CMD 0x0042
84 #define EMMC_DATA0 0x0044
85 #define EMMC_DATA1 0x0046
86 #define EMMC_DATA2 0x0048
87 #define EMMC_DATA3 0x004a
88 #define EMMC_DATA4 0x004c
89 #define EMMC_DATA5 0x004e
90 #define EMMC_DATA6 0x0050
91 #define EMMC_DATA7 0x0052
92 #define C2C_CLKOUT0 0x0054
93 #define C2C_CLKOUT1 0x0056
94 #define C2C_CLKIN0 0x0058
95 #define C2C_CLKIN1 0x005a
96 #define C2C_DATAIN0 0x005c
97 #define C2C_DATAIN1 0x005e
98 #define C2C_DATAIN2 0x0060
99 #define C2C_DATAIN3 0x0062
100 #define C2C_DATAIN4 0x0064
101 #define C2C_DATAIN5 0x0066
102 #define C2C_DATAIN6 0x0068
103 #define C2C_DATAIN7 0x006a
104 #define C2C_DATAOUT0 0x006c
105 #define C2C_DATAOUT1 0x006e
106 #define C2C_DATAOUT2 0x0070
107 #define C2C_DATAOUT3 0x0072
108 #define C2C_DATAOUT4 0x0074
109 #define C2C_DATAOUT5 0x0076
110 #define C2C_DATAOUT6 0x0078
111 #define C2C_DATAOUT7 0x007a
112 #define C2C_DATA8 0x007c
113 #define C2C_DATA9 0x007e
114 #define C2C_DATA10 0x0080
115 #define C2C_DATA11 0x0082
116 #define C2C_DATA12 0x0084
117 #define C2C_DATA13 0x0086
118 #define C2C_DATA14 0x0088
119 #define C2C_DATA15 0x008a
120 #define LLIA_WAKEREQOUT 0x008c
121 #define LLIB_WAKEREQOUT 0x008e
122 #define HSI1_ACREADY 0x0090
123 #define HSI1_CAREADY 0x0092
124 #define HSI1_ACWAKE 0x0094
125 #define HSI1_CAWAKE 0x0096
126 #define HSI1_ACFLAG 0x0098
127 #define HSI1_ACDATA 0x009a
128 #define HSI1_CAFLAG 0x009c
129 #define HSI1_CADATA 0x009e
130 #define UART1_TX 0x00a0
131 #define UART1_CTS 0x00a2
132 #define UART1_RX 0x00a4
133 #define UART1_RTS 0x00a6
134 #define HSI2_CAREADY 0x00a8
135 #define HSI2_ACREADY 0x00aa
136 #define HSI2_CAWAKE 0x00ac
137 #define HSI2_ACWAKE 0x00ae
138 #define HSI2_CAFLAG 0x00b0
139 #define HSI2_CADATA 0x00b2
140 #define HSI2_ACFLAG 0x00b4
141 #define HSI2_ACDATA 0x00b6
142 #define UART2_RTS 0x00b8
143 #define UART2_CTS 0x00ba
144 #define UART2_RX 0x00bc
145 #define UART2_TX 0x00be
146 #define USBB1_HSIC_STROBE 0x00c0
147 #define USBB1_HSIC_DATA 0x00c2
148 #define USBB2_HSIC_STROBE 0x00c4
149 #define USBB2_HSIC_DATA 0x00c6
150 #define TIMER10_PWM_EVT 0x00c8
151 #define DSIPORTA_TE0 0x00ca
152 #define DSIPORTA_LANE0X 0x00cc
153 #define DSIPORTA_LANE0Y 0x00ce
154 #define DSIPORTA_LANE1X 0x00d0
155 #define DSIPORTA_LANE1Y 0x00d2
156 #define DSIPORTA_LANE2X 0x00d4
157 #define DSIPORTA_LANE2Y 0x00d6
158 #define DSIPORTA_LANE3X 0x00d8
159 #define DSIPORTA_LANE3Y 0x00da
160 #define DSIPORTA_LANE4X 0x00dc
161 #define DSIPORTA_LANE4Y 0x00de
162 #define DSIPORTC_LANE0X 0x00e0
163 #define DSIPORTC_LANE0Y 0x00e2
164 #define DSIPORTC_LANE1X 0x00e4
165 #define DSIPORTC_LANE1Y 0x00e6
166 #define DSIPORTC_LANE2X 0x00e8
167 #define DSIPORTC_LANE2Y 0x00ea
168 #define DSIPORTC_LANE3X 0x00ec
169 #define DSIPORTC_LANE3Y 0x00ee
170 #define DSIPORTC_LANE4X 0x00f0
171 #define DSIPORTC_LANE4Y 0x00f2
172 #define DSIPORTC_TE0 0x00f4
173 #define TIMER9_PWM_EVT 0x00f6
174 #define I2C4_SCL 0x00f8
175 #define I2C4_SDA 0x00fa
176 #define MCSPI2_CLK 0x00fc
177 #define MCSPI2_SIMO 0x00fe
178 #define MCSPI2_SOMI 0x0100
179 #define MCSPI2_CS0 0x0102
180 #define RFBI_DATA15 0x0104
181 #define RFBI_DATA14 0x0106
182 #define RFBI_DATA13 0x0108
183 #define RFBI_DATA12 0x010a
184 #define RFBI_DATA11 0x010c
185 #define RFBI_DATA10 0x010e
186 #define RFBI_DATA9 0x0110
187 #define RFBI_DATA8 0x0112
188 #define RFBI_DATA7 0x0114
189 #define RFBI_DATA6 0x0116
190 #define RFBI_DATA5 0x0118
191 #define RFBI_DATA4 0x011a
192 #define RFBI_DATA3 0x011c
193 #define RFBI_DATA2 0x011e
194 #define RFBI_DATA1 0x0120
195 #define RFBI_DATA0 0x0122
196 #define RFBI_WE 0x0124
197 #define RFBI_CS0 0x0126
198 #define RFBI_A0 0x0128
199 #define RFBI_RE 0x012a
200 #define RFBI_HSYNC0 0x012c
201 #define RFBI_TE_VSYNC0 0x012e
202 #define GPIO6_182 0x0130
203 #define GPIO6_183 0x0132
204 #define GPIO6_184 0x0134
205 #define GPIO6_185 0x0136
206 #define GPIO6_186 0x0138
207 #define GPIO6_187 0x013a
208 #define HDMI_CEC 0x013c
209 #define HDMI_HPD 0x013e
210 #define HDMI_DDC_SCL 0x0140
211 #define HDMI_DDC_SDA 0x0142
212 #define CSIPORTC_LANE0X 0x0144
213 #define CSIPORTC_LANE0Y 0x0146
214 #define CSIPORTC_LANE1X 0x0148
215 #define CSIPORTC_LANE1Y 0x014a
216 #define CSIPORTB_LANE0X 0x014c
217 #define CSIPORTB_LANE0Y 0x014e
218 #define CSIPORTB_LANE1X 0x0150
219 #define CSIPORTB_LANE1Y 0x0152
220 #define CSIPORTB_LANE2X 0x0154
221 #define CSIPORTB_LANE2Y 0x0156
222 #define CSIPORTA_LANE0X 0x0158
223 #define CSIPORTA_LANE0Y 0x015a
224 #define CSIPORTA_LANE1X 0x015c
225 #define CSIPORTA_LANE1Y 0x015e
226 #define CSIPORTA_LANE2X 0x0160
227 #define CSIPORTA_LANE2Y 0x0162
228 #define CSIPORTA_LANE3X 0x0164
229 #define CSIPORTA_LANE3Y 0x0166
230 #define CSIPORTA_LANE4X 0x0168
231 #define CSIPORTA_LANE4Y 0x016a
232 #define CAM_SHUTTER 0x016c
233 #define CAM_STROBE 0x016e
234 #define CAM_GLOBALRESET 0x0170
235 #define TIMER11_PWM_EVT 0x0172
236 #define TIMER5_PWM_EVT 0x0174
237 #define TIMER6_PWM_EVT 0x0176
238 #define TIMER8_PWM_EVT 0x0178
239 #define I2C3_SCL 0x017a
240 #define I2C3_SDA 0x017c
241 #define GPIO8_233 0x017e
242 #define GPIO8_234 0x0180
243 #define ABE_CLKS 0x0182
244 #define ABEDMIC_DIN1 0x0184
245 #define ABEDMIC_DIN2 0x0186
246 #define ABEDMIC_DIN3 0x0188
247 #define ABEDMIC_CLK1 0x018a
248 #define ABEDMIC_CLK2 0x018c
249 #define ABEDMIC_CLK3 0x018e
250 #define ABESLIMBUS1_CLOCK 0x0190
251 #define ABESLIMBUS1_DATA 0x0192
252 #define ABEMCBSP2_DR 0x0194
253 #define ABEMCBSP2_DX 0x0196
254 #define ABEMCBSP2_FSX 0x0198
255 #define ABEMCBSP2_CLKX 0x019a
256 #define ABEMCPDM_UL_DATA 0x019c
257 #define ABEMCPDM_DL_DATA 0x019e
258 #define ABEMCPDM_FRAME 0x01a0
259 #define ABEMCPDM_LB_CLK 0x01a2
260 #define WLSDIO_CLK 0x01a4
261 #define WLSDIO_CMD 0x01a6
262 #define WLSDIO_DATA0 0x01a8
263 #define WLSDIO_DATA1 0x01aa
264 #define WLSDIO_DATA2 0x01ac
265 #define WLSDIO_DATA3 0x01ae
266 #define UART5_RX 0x01b0
267 #define UART5_TX 0x01b2
268 #define UART5_CTS 0x01b4
269 #define UART5_RTS 0x01b6
270 #define I2C2_SCL 0x01b8
271 #define I2C2_SDA 0x01ba
272 #define MCSPI1_CLK 0x01bc
273 #define MCSPI1_SOMI 0x01be
274 #define MCSPI1_SIMO 0x01c0
275 #define MCSPI1_CS0 0x01c2
276 #define MCSPI1_CS1 0x01c4
277 #define I2C5_SCL 0x01c6
278 #define I2C5_SDA 0x01c8
279 #define PERSLIMBUS2_CLOCK 0x01ca
280 #define PERSLIMBUS2_DATA 0x01cc
281 #define UART6_TX 0x01ce
282 #define UART6_RX 0x01d0
283 #define UART6_CTS 0x01d2
284 #define UART6_RTS 0x01d4
285 #define UART3_CTS_RCTX 0x01d6
286 #define UART3_RTS_IRSD 0x01d8
287 #define UART3_TX_IRTX 0x01da
288 #define UART3_RX_IRRX 0x01dc
289 #define USBB3_HSIC_STROBE 0x01de
290 #define USBB3_HSIC_DATA 0x01e0
291 #define SDCARD_CLK 0x01e2
292 #define SDCARD_CMD 0x01e4
293 #define SDCARD_DATA2 0x01e6
294 #define SDCARD_DATA3 0x01e8
295 #define SDCARD_DATA0 0x01ea
296 #define SDCARD_DATA1 0x01ec
297 #define USBD0_HS_DP 0x01ee
298 #define USBD0_HS_DM 0x01f0
299 #define I2C1_PMIC_SCL 0x01f2
300 #define I2C1_PMIC_SDA 0x01f4
301 #define USBD0_SS_RX 0x01f6
303 #define LLIA_WAKEREQIN 0x0040
304 #define LLIB_WAKEREQIN 0x0042
305 #define DRM_EMU0 0x0044
306 #define DRM_EMU1 0x0046
307 #define JTAG_NTRST 0x0048
308 #define JTAG_TCK 0x004a
309 #define JTAG_RTCK 0x004c
310 #define JTAG_TMSC 0x004e
311 #define JTAG_TDI 0x0050
312 #define JTAG_TDO 0x0052
313 #define SYS_32K 0x0054
314 #define FREF_CLK_IOREQ 0x0056
315 #define FREF_CLK0_OUT 0x0058
316 #define FREF_CLK1_OUT 0x005a
317 #define FREF_CLK2_OUT 0x005c
318 #define FREF_CLK2_REQ 0x005e
319 #define FREF_CLK1_REQ 0x0060
320 #define SYS_NRESPWRON 0x0062
321 #define SYS_NRESWARM 0x0064
322 #define SYS_PWR_REQ 0x0066
323 #define SYS_NIRQ1 0x0068
324 #define SYS_NIRQ2 0x006a
325 #define SR_PMIC_SCL 0x006c
326 #define SR_PMIC_SDA 0x006e
327 #define SYS_BOOT0 0x0070
328 #define SYS_BOOT1 0x0072
329 #define SYS_BOOT2 0x0074
330 #define SYS_BOOT3 0x0076
331 #define SYS_BOOT4 0x0078
332 #define SYS_BOOT5 0x007a
334 #endif /* _MUX_OMAP5_H_ */