MXS: Add static annotations to dma driver
[oweals/u-boot.git] / arch / arm / include / asm / arch-mx28 / regs-bch.h
1 /*
2  * Freescale i.MX28 BCH Register Definitions
3  *
4  * Copyright (C) 2011 Marek Vasut <marek.vasut@gmail.com>
5  * on behalf of DENX Software Engineering GmbH
6  *
7  * Based on code from LTIB:
8  * Copyright 2008-2010 Freescale Semiconductor, Inc. All Rights Reserved.
9  *
10  * This program is free software; you can redistribute it and/or modify
11  * it under the terms of the GNU General Public License as published by
12  * the Free Software Foundation; either version 2 of the License, or
13  * (at your option) any later version.
14  *
15  * This program is distributed in the hope that it will be useful,
16  * but WITHOUT ANY WARRANTY; without even the implied warranty of
17  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
18  * GNU General Public License for more details.
19  *
20  * You should have received a copy of the GNU General Public License
21  * along with this program; if not, write to the Free Software
22  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
23  *
24  */
25
26 #ifndef __MX28_REGS_BCH_H__
27 #define __MX28_REGS_BCH_H__
28
29 #include <asm/arch/regs-common.h>
30
31 #ifndef __ASSEMBLY__
32 struct mx28_bch_regs {
33         mx28_reg(hw_bch_ctrl)
34         mx28_reg(hw_bch_status0)
35         mx28_reg(hw_bch_mode)
36         mx28_reg(hw_bch_encodeptr)
37         mx28_reg(hw_bch_dataptr)
38         mx28_reg(hw_bch_metaptr)
39
40         uint32_t        reserved[4];
41
42         mx28_reg(hw_bch_layoutselect)
43         mx28_reg(hw_bch_flash0layout0)
44         mx28_reg(hw_bch_flash0layout1)
45         mx28_reg(hw_bch_flash1layout0)
46         mx28_reg(hw_bch_flash1layout1)
47         mx28_reg(hw_bch_flash2layout0)
48         mx28_reg(hw_bch_flash2layout1)
49         mx28_reg(hw_bch_flash3layout0)
50         mx28_reg(hw_bch_flash3layout1)
51         mx28_reg(hw_bch_dbgkesread)
52         mx28_reg(hw_bch_dbgcsferead)
53         mx28_reg(hw_bch_dbgsyndegread)
54         mx28_reg(hw_bch_dbgahbmread)
55         mx28_reg(hw_bch_blockname)
56         mx28_reg(hw_bch_version)
57 };
58 #endif
59
60 #define BCH_CTRL_SFTRST                                 (1 << 31)
61 #define BCH_CTRL_CLKGATE                                (1 << 30)
62 #define BCH_CTRL_DEBUGSYNDROME                          (1 << 22)
63 #define BCH_CTRL_M2M_LAYOUT_MASK                        (0x3 << 18)
64 #define BCH_CTRL_M2M_LAYOUT_OFFSET                      18
65 #define BCH_CTRL_M2M_ENCODE                             (1 << 17)
66 #define BCH_CTRL_M2M_ENABLE                             (1 << 16)
67 #define BCH_CTRL_DEBUG_STALL_IRQ_EN                     (1 << 10)
68 #define BCH_CTRL_COMPLETE_IRQ_EN                        (1 << 8)
69 #define BCH_CTRL_BM_ERROR_IRQ                           (1 << 3)
70 #define BCH_CTRL_DEBUG_STALL_IRQ                        (1 << 2)
71 #define BCH_CTRL_COMPLETE_IRQ                           (1 << 0)
72
73 #define BCH_STATUS0_HANDLE_MASK                         (0xfff << 20)
74 #define BCH_STATUS0_HANDLE_OFFSET                       20
75 #define BCH_STATUS0_COMPLETED_CE_MASK                   (0xf << 16)
76 #define BCH_STATUS0_COMPLETED_CE_OFFSET                 16
77 #define BCH_STATUS0_STATUS_BLK0_MASK                    (0xff << 8)
78 #define BCH_STATUS0_STATUS_BLK0_OFFSET                  8
79 #define BCH_STATUS0_STATUS_BLK0_ZERO                    (0x00 << 8)
80 #define BCH_STATUS0_STATUS_BLK0_ERROR1                  (0x01 << 8)
81 #define BCH_STATUS0_STATUS_BLK0_ERROR2                  (0x02 << 8)
82 #define BCH_STATUS0_STATUS_BLK0_ERROR3                  (0x03 << 8)
83 #define BCH_STATUS0_STATUS_BLK0_ERROR4                  (0x04 << 8)
84 #define BCH_STATUS0_STATUS_BLK0_UNCORRECTABLE           (0xfe << 8)
85 #define BCH_STATUS0_STATUS_BLK0_ERASED                  (0xff << 8)
86 #define BCH_STATUS0_ALLONES                             (1 << 4)
87 #define BCH_STATUS0_CORRECTED                           (1 << 3)
88 #define BCH_STATUS0_UNCORRECTABLE                       (1 << 2)
89
90 #define BCH_MODE_ERASE_THRESHOLD_MASK                   0xff
91 #define BCH_MODE_ERASE_THRESHOLD_OFFSET                 0
92
93 #define BCH_ENCODEPTR_ADDR_MASK                         0xffffffff
94 #define BCH_ENCODEPTR_ADDR_OFFSET                       0
95
96 #define BCH_DATAPTR_ADDR_MASK                           0xffffffff
97 #define BCH_DATAPTR_ADDR_OFFSET                         0
98
99 #define BCH_METAPTR_ADDR_MASK                           0xffffffff
100 #define BCH_METAPTR_ADDR_OFFSET                         0
101
102 #define BCH_LAYOUTSELECT_CS15_SELECT_MASK               (0x3 << 30)
103 #define BCH_LAYOUTSELECT_CS15_SELECT_OFFSET             30
104 #define BCH_LAYOUTSELECT_CS14_SELECT_MASK               (0x3 << 28)
105 #define BCH_LAYOUTSELECT_CS14_SELECT_OFFSET             28
106 #define BCH_LAYOUTSELECT_CS13_SELECT_MASK               (0x3 << 26)
107 #define BCH_LAYOUTSELECT_CS13_SELECT_OFFSET             26
108 #define BCH_LAYOUTSELECT_CS12_SELECT_MASK               (0x3 << 24)
109 #define BCH_LAYOUTSELECT_CS12_SELECT_OFFSET             24
110 #define BCH_LAYOUTSELECT_CS11_SELECT_MASK               (0x3 << 22)
111 #define BCH_LAYOUTSELECT_CS11_SELECT_OFFSET             22
112 #define BCH_LAYOUTSELECT_CS10_SELECT_MASK               (0x3 << 20)
113 #define BCH_LAYOUTSELECT_CS10_SELECT_OFFSET             20
114 #define BCH_LAYOUTSELECT_CS9_SELECT_MASK                (0x3 << 18)
115 #define BCH_LAYOUTSELECT_CS9_SELECT_OFFSET              18
116 #define BCH_LAYOUTSELECT_CS8_SELECT_MASK                (0x3 << 16)
117 #define BCH_LAYOUTSELECT_CS8_SELECT_OFFSET              16
118 #define BCH_LAYOUTSELECT_CS7_SELECT_MASK                (0x3 << 14)
119 #define BCH_LAYOUTSELECT_CS7_SELECT_OFFSET              14
120 #define BCH_LAYOUTSELECT_CS6_SELECT_MASK                (0x3 << 12)
121 #define BCH_LAYOUTSELECT_CS6_SELECT_OFFSET              12
122 #define BCH_LAYOUTSELECT_CS5_SELECT_MASK                (0x3 << 10)
123 #define BCH_LAYOUTSELECT_CS5_SELECT_OFFSET              10
124 #define BCH_LAYOUTSELECT_CS4_SELECT_MASK                (0x3 << 8)
125 #define BCH_LAYOUTSELECT_CS4_SELECT_OFFSET              8
126 #define BCH_LAYOUTSELECT_CS3_SELECT_MASK                (0x3 << 6)
127 #define BCH_LAYOUTSELECT_CS3_SELECT_OFFSET              6
128 #define BCH_LAYOUTSELECT_CS2_SELECT_MASK                (0x3 << 4)
129 #define BCH_LAYOUTSELECT_CS2_SELECT_OFFSET              4
130 #define BCH_LAYOUTSELECT_CS1_SELECT_MASK                (0x3 << 2)
131 #define BCH_LAYOUTSELECT_CS1_SELECT_OFFSET              2
132 #define BCH_LAYOUTSELECT_CS0_SELECT_MASK                (0x3 << 0)
133 #define BCH_LAYOUTSELECT_CS0_SELECT_OFFSET              0
134
135 #define BCH_FLASHLAYOUT0_NBLOCKS_MASK                   (0xff << 24)
136 #define BCH_FLASHLAYOUT0_NBLOCKS_OFFSET                 24
137 #define BCH_FLASHLAYOUT0_META_SIZE_MASK                 (0xff << 16)
138 #define BCH_FLASHLAYOUT0_META_SIZE_OFFSET               16
139 #define BCH_FLASHLAYOUT0_ECC0_MASK                      (0xf << 12)
140 #define BCH_FLASHLAYOUT0_ECC0_OFFSET                    12
141 #define BCH_FLASHLAYOUT0_ECC0_NONE                      (0x0 << 12)
142 #define BCH_FLASHLAYOUT0_ECC0_ECC2                      (0x1 << 12)
143 #define BCH_FLASHLAYOUT0_ECC0_ECC4                      (0x2 << 12)
144 #define BCH_FLASHLAYOUT0_ECC0_ECC6                      (0x3 << 12)
145 #define BCH_FLASHLAYOUT0_ECC0_ECC8                      (0x4 << 12)
146 #define BCH_FLASHLAYOUT0_ECC0_ECC10                     (0x5 << 12)
147 #define BCH_FLASHLAYOUT0_ECC0_ECC12                     (0x6 << 12)
148 #define BCH_FLASHLAYOUT0_ECC0_ECC14                     (0x7 << 12)
149 #define BCH_FLASHLAYOUT0_ECC0_ECC16                     (0x8 << 12)
150 #define BCH_FLASHLAYOUT0_ECC0_ECC18                     (0x9 << 12)
151 #define BCH_FLASHLAYOUT0_ECC0_ECC20                     (0xa << 12)
152 #define BCH_FLASHLAYOUT0_ECC0_ECC22                     (0xb << 12)
153 #define BCH_FLASHLAYOUT0_ECC0_ECC24                     (0xc << 12)
154 #define BCH_FLASHLAYOUT0_ECC0_ECC26                     (0xd << 12)
155 #define BCH_FLASHLAYOUT0_ECC0_ECC28                     (0xe << 12)
156 #define BCH_FLASHLAYOUT0_ECC0_ECC30                     (0xf << 12)
157 #define BCH_FLASHLAYOUT0_ECC0_ECC32                     (0x10 << 12)
158 #define BCH_FLASHLAYOUT0_GF13_0_GF14_1                  (1 << 10)
159 #define BCH_FLASHLAYOUT0_DATA0_SIZE_MASK                0xfff
160 #define BCH_FLASHLAYOUT0_DATA0_SIZE_OFFSET              0
161
162 #define BCH_FLASHLAYOUT1_PAGE_SIZE_MASK                 (0xffff << 16)
163 #define BCH_FLASHLAYOUT1_PAGE_SIZE_OFFSET               16
164 #define BCH_FLASHLAYOUT1_ECCN_MASK                      (0xf << 12)
165 #define BCH_FLASHLAYOUT1_ECCN_OFFSET                    12
166 #define BCH_FLASHLAYOUT1_ECCN_NONE                      (0x0 << 12)
167 #define BCH_FLASHLAYOUT1_ECCN_ECC2                      (0x1 << 12)
168 #define BCH_FLASHLAYOUT1_ECCN_ECC4                      (0x2 << 12)
169 #define BCH_FLASHLAYOUT1_ECCN_ECC6                      (0x3 << 12)
170 #define BCH_FLASHLAYOUT1_ECCN_ECC8                      (0x4 << 12)
171 #define BCH_FLASHLAYOUT1_ECCN_ECC10                     (0x5 << 12)
172 #define BCH_FLASHLAYOUT1_ECCN_ECC12                     (0x6 << 12)
173 #define BCH_FLASHLAYOUT1_ECCN_ECC14                     (0x7 << 12)
174 #define BCH_FLASHLAYOUT1_ECCN_ECC16                     (0x8 << 12)
175 #define BCH_FLASHLAYOUT1_ECCN_ECC18                     (0x9 << 12)
176 #define BCH_FLASHLAYOUT1_ECCN_ECC20                     (0xa << 12)
177 #define BCH_FLASHLAYOUT1_ECCN_ECC22                     (0xb << 12)
178 #define BCH_FLASHLAYOUT1_ECCN_ECC24                     (0xc << 12)
179 #define BCH_FLASHLAYOUT1_ECCN_ECC26                     (0xd << 12)
180 #define BCH_FLASHLAYOUT1_ECCN_ECC28                     (0xe << 12)
181 #define BCH_FLASHLAYOUT1_ECCN_ECC30                     (0xf << 12)
182 #define BCH_FLASHLAYOUT1_ECCN_ECC32                     (0x10 << 12)
183 #define BCH_FLASHLAYOUT1_GF13_0_GF14_1                  (1 << 10)
184 #define BCH_FLASHLAYOUT1_DATAN_SIZE_MASK                0xfff
185 #define BCH_FLASHLAYOUT1_DATAN_SIZE_OFFSET              0
186
187 #define BCH_DEBUG0_RSVD1_MASK                           (0x1f << 27)
188 #define BCH_DEBUG0_RSVD1_OFFSET                         27
189 #define BCH_DEBUG0_ROM_BIST_ENABLE                      (1 << 26)
190 #define BCH_DEBUG0_ROM_BIST_COMPLETE                    (1 << 25)
191 #define BCH_DEBUG0_KES_DEBUG_SYNDROME_SYMBOL_MASK       (0x1ff << 16)
192 #define BCH_DEBUG0_KES_DEBUG_SYNDROME_SYMBOL_OFFSET     16
193 #define BCH_DEBUG0_KES_DEBUG_SYNDROME_SYMBOL_NORMAL     (0x0 << 16)
194 #define BCH_DEBUG0_KES_DEBUG_SYNDROME_SYMBOL_TEST_MODE  (0x1 << 16)
195 #define BCH_DEBUG0_KES_DEBUG_SHIFT_SYND                 (1 << 15)
196 #define BCH_DEBUG0_KES_DEBUG_PAYLOAD_FLAG               (1 << 14)
197 #define BCH_DEBUG0_KES_DEBUG_MODE4K                     (1 << 13)
198 #define BCH_DEBUG0_KES_DEBUG_KICK                       (1 << 12)
199 #define BCH_DEBUG0_KES_STANDALONE                       (1 << 11)
200 #define BCH_DEBUG0_KES_DEBUG_STEP                       (1 << 10)
201 #define BCH_DEBUG0_KES_DEBUG_STALL                      (1 << 9)
202 #define BCH_DEBUG0_BM_KES_TEST_BYPASS                   (1 << 8)
203 #define BCH_DEBUG0_RSVD0_MASK                           (0x3 << 6)
204 #define BCH_DEBUG0_RSVD0_OFFSET                         6
205 #define BCH_DEBUG0_DEBUG_REG_SELECT_MASK                0x3f
206 #define BCH_DEBUG0_DEBUG_REG_SELECT_OFFSET              0
207
208 #define BCH_DBGKESREAD_VALUES_MASK                      0xffffffff
209 #define BCH_DBGKESREAD_VALUES_OFFSET                    0
210
211 #define BCH_DBGCSFEREAD_VALUES_MASK                     0xffffffff
212 #define BCH_DBGCSFEREAD_VALUES_OFFSET                   0
213
214 #define BCH_DBGSYNDGENREAD_VALUES_MASK                  0xffffffff
215 #define BCH_DBGSYNDGENREAD_VALUES_OFFSET                0
216
217 #define BCH_DBGAHBMREAD_VALUES_MASK                     0xffffffff
218 #define BCH_DBGAHBMREAD_VALUES_OFFSET                   0
219
220 #define BCH_BLOCKNAME_NAME_MASK                         0xffffffff
221 #define BCH_BLOCKNAME_NAME_OFFSET                       0
222
223 #define BCH_VERSION_MAJOR_MASK                          (0xff << 24)
224 #define BCH_VERSION_MAJOR_OFFSET                        24
225 #define BCH_VERSION_MINOR_MASK                          (0xff << 16)
226 #define BCH_VERSION_MINOR_OFFSET                        16
227 #define BCH_VERSION_STEP_MASK                           0xffff
228 #define BCH_VERSION_STEP_OFFSET                         0
229
230 #endif  /* __MX28_REGS_BCH_H__ */