3 * Matthias Weisser <weisserm@arcor.de>
5 * (C) Copyright 2009 DENX Software Engineering
6 * Author: John Rigby <jrigby@gmail.com>
8 * Common asm macros for imx25
10 * See file CREDITS for list of people who contributed to this
13 * This program is free software; you can redistribute it and/or
14 * modify it under the terms of the GNU General Public License as
15 * published by the Free Software Foundation; either version 2 of
16 * the License, or (at your option) any later version.
18 * This program is distributed in the hope that it will be useful,
19 * but WITHOUT ANY WARRANTY; without even the implied warranty of
20 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
21 * GNU General Public License for more details.
23 * You should have received a copy of the GNU General Public License
24 * along with this program; if not, write to the Free Software
25 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
29 #ifndef __ASM_ARM_ARCH_MACRO_H__
30 #define __ASM_ARM_ARCH_MACRO_H__
33 #include <asm/arch/imx-regs.h>
34 #include <generated/asm-offsets.h>
35 #include <asm/macro.h>
38 * AIPS setup - Only setup MPROTx registers.
39 * The PACR default values are good.
41 * Default argument values:
42 * - MPR: Set all MPROTx to be non-bufferable, trusted for R/W, not forced to
45 .macro init_aips mpr=0x77777777
46 ldr r0, =IMX_AIPS1_BASE
48 str r1, [r0, #AIPS_MPR_0_7]
49 str r1, [r0, #AIPS_MPR_8_15]
50 ldr r2, =IMX_AIPS2_BASE
51 str r1, [r2, #AIPS_MPR_0_7]
52 str r1, [r2, #AIPS_MPR_8_15]
56 * MAX (Multi-Layer AHB Crossbar Switch) setup
58 * Default argument values:
59 * - MPR: priority is IAHB > DAHB > USBOTG > RTIC > eSDHC2/SDMA
60 * - SGPCR: always park on last master
61 * - MGPCR: restore default values
63 .macro init_max mpr=0x00043210, sgpcr=0x00000010, mgpcr=0x00000000
66 str r1, [r0, #MAX_MPR0] /* for S0 */
67 str r1, [r0, #MAX_MPR1] /* for S1 */
68 str r1, [r0, #MAX_MPR2] /* for S2 */
69 str r1, [r0, #MAX_MPR3] /* for S3 */
70 str r1, [r0, #MAX_MPR4] /* for S4 */
72 str r1, [r0, #MAX_SGPCR0] /* for S0 */
73 str r1, [r0, #MAX_SGPCR1] /* for S1 */
74 str r1, [r0, #MAX_SGPCR2] /* for S2 */
75 str r1, [r0, #MAX_SGPCR3] /* for S3 */
76 str r1, [r0, #MAX_SGPCR4] /* for S4 */
78 str r1, [r0, #MAX_MGPCR0] /* for M0 */
79 str r1, [r0, #MAX_MGPCR1] /* for M1 */
80 str r1, [r0, #MAX_MGPCR2] /* for M2 */
81 str r1, [r0, #MAX_MGPCR3] /* for M3 */
82 str r1, [r0, #MAX_MGPCR4] /* for M4 */
88 * Default argument values:
90 * MRRP[0] = LCDC on priority list (1 << 0) = 0x00000001
91 * MRRP[1] = MAX1 not on priority list (0 << 1) = 0x00000000
92 * MRRP[2] = MAX0 not on priority list (0 << 2) = 0x00000000
93 * MRRP[3] = USBH not on priority list (0 << 3) = 0x00000000
94 * MRRP[4] = SDMA not on priority list (0 << 4) = 0x00000000
95 * MRRP[5] = eSDHC1/ATA/FEC not on priority list (0 << 5) = 0x00000000
96 * MRRP[6] = LCDC/SLCDC/MAX2 not on priority list (0 << 6) = 0x00000000
97 * MRRP[7] = CSI not on priority list (0 << 7) = 0x00000000
101 .macro init_m3if ctl=0x00000001
102 /* M3IF Control Register (M3IFCTL) */
103 write32 IMX_M3IF_CTRL_BASE, \ctl
106 #endif /* __ASSEMBLY__ */
107 #endif /* __ASM_ARM_ARCH_MACRO_H__ */