2 * Copyright (C) 2011 by Vladimir Zapolskiy <vz@mleia.com>
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License
6 * as published by the Free Software Foundation; either version 2
7 * of the License, or (at your option) any later version.
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
20 #ifndef _LPC32XX_UART_H
21 #define _LPC32XX_UART_H
23 #include <asm/types.h>
25 /* 14-clock UART Registers */
28 u32 rx; /* Receiver FIFO */
29 u32 tx; /* Transmitter FIFO */
31 u32 level; /* FIFO Level Register */
32 u32 iir; /* Interrupt ID Register */
33 u32 ctrl; /* Control Register */
34 u32 rate; /* Rate Control Register */
37 /* 14-clock UART Receiver FIFO Register bits */
38 #define HSUART_RX_BREAK (1 << 10)
39 #define HSUART_RX_ERROR (1 << 9)
40 #define HSUART_RX_EMPTY (1 << 8)
41 #define HSUART_RX_DATA (0xff << 0)
43 /* 14-clock UART Level Register bits */
44 #define HSUART_LEVEL_TX (0xff << 8)
45 #define HSUART_LEVEL_RX (0xff << 0)
47 /* 14-clock UART Interrupt Identification Register bits */
48 #define HSUART_IIR_TX_INT_SET (1 << 6)
49 #define HSUART_IIR_RX_OE (1 << 5)
50 #define HSUART_IIR_BRK (1 << 4)
51 #define HSUART_IIR_FE (1 << 3)
52 #define HSUART_IIR_RX_TIMEOUT (1 << 2)
53 #define HSUART_IIR_RX_TRIG (1 << 1)
54 #define HSUART_IIR_TX (1 << 0)
56 /* 14-clock UART Control Register bits */
57 #define HSUART_CTRL_HRTS_INV (1 << 21)
58 #define HSUART_CTRL_HRTS_TRIG_48 (0x3 << 19)
59 #define HSUART_CTRL_HRTS_TRIG_32 (0x2 << 19)
60 #define HSUART_CTRL_HRTS_TRIG_16 (0x1 << 19)
61 #define HSUART_CTRL_HRTS_TRIG_8 (0x0 << 19)
62 #define HSUART_CTRL_HRTS_EN (1 << 18)
63 #define HSUART_CTRL_TMO_16 (0x3 << 16)
64 #define HSUART_CTRL_TMO_8 (0x2 << 16)
65 #define HSUART_CTRL_TMO_4 (0x1 << 16)
66 #define HSUART_CTRL_TMO_DISABLED (0x0 << 16)
67 #define HSUART_CTRL_HCTS_INV (1 << 15)
68 #define HSUART_CTRL_HCTS_EN (1 << 14)
69 #define HSUART_CTRL_HSU_OFFSET(n) ((n) << 9)
70 #define HSUART_CTRL_HSU_BREAK (1 << 8)
71 #define HSUART_CTRL_HSU_ERR_INT_EN (1 << 7)
72 #define HSUART_CTRL_HSU_RX_INT_EN (1 << 6)
73 #define HSUART_CTRL_HSU_TX_INT_EN (1 << 5)
74 #define HSUART_CTRL_HSU_RX_TRIG_48 (0x5 << 2)
75 #define HSUART_CTRL_HSU_RX_TRIG_32 (0x4 << 2)
76 #define HSUART_CTRL_HSU_RX_TRIG_16 (0x3 << 2)
77 #define HSUART_CTRL_HSU_RX_TRIG_8 (0x2 << 2)
78 #define HSUART_CTRL_HSU_RX_TRIG_4 (0x1 << 2)
79 #define HSUART_CTRL_HSU_RX_TRIG_1 (0x0 << 2)
80 #define HSUART_CTRL_HSU_TX_TRIG_16 (0x3 << 0)
81 #define HSUART_CTRL_HSU_TX_TRIG_8 (0x2 << 0)
82 #define HSUART_CTRL_HSU_TX_TRIG_4 (0x1 << 0)
83 #define HSUART_CTRL_HSU_TX_TRIG_0 (0x0 << 0)
85 /* UART Control Registers */
86 struct uart_ctrl_regs {
87 u32 ctrl; /* Control Register */
88 u32 clkmode; /* Clock Mode Register */
89 u32 loop; /* Loopback Control Register */
92 /* UART Control Register bits */
93 #define UART_CTRL_UART3_MD_CTRL (1 << 11)
94 #define UART_CTRL_HDPX_INV (1 << 10)
95 #define UART_CTRL_HDPX_EN (1 << 9)
96 #define UART_CTRL_UART6_IRDA (1 << 5)
97 #define UART_CTRL_IR_TX6_INV (1 << 4)
98 #define UART_CTRL_IR_RX6_INV (1 << 3)
99 #define UART_CTRL_IR_RX_LENGTH (1 << 2)
100 #define UART_CTRL_IR_TX_LENGTH (1 << 1)
101 #define UART_CTRL_UART5_USB_MODE (1 << 0)
103 /* UART Clock Mode Register bits */
104 #define UART_CLKMODE_STATX(n) (1 << ((n) + 16))
105 #define UART_CLKMODE_STAT (1 << 14)
106 #define UART_CLKMODE_MASK(n) (0x3 << (2 * (n) - 2))
107 #define UART_CLKMODE_AUTO(n) (0x2 << (2 * (n) - 2))
108 #define UART_CLKMODE_ON(n) (0x1 << (2 * (n) - 2))
109 #define UART_CLKMODE_OFF(n) (0x0 << (2 * (n) - 2))
111 /* UART Loopback Control Register bits */
112 #define UART_LOOPBACK(n) (1 << ((n) - 1))
114 #endif /* _LPC32XX_UART_H */