ARM: OMAP5: Enable support for AVS0 for OMAP5 production devices
[oweals/u-boot.git] / arch / arm / include / asm / arch-lpc32xx / config.h
1 /*
2  * Common definitions for LPC32XX board configurations
3  *
4  * Copyright (C) 2011-2015 Vladimir Zapolskiy <vz@mleia.com>
5  *
6  * SPDX-License-Identifier:     GPL-2.0+
7  */
8
9 #ifndef _LPC32XX_CONFIG_H
10 #define _LPC32XX_CONFIG_H
11
12
13 /* Basic CPU architecture */
14 #define CONFIG_ARCH_CPU_INIT
15
16 #define CONFIG_NR_DRAM_BANKS_MAX        2
17
18 /* UART configuration */
19 #if     (CONFIG_SYS_LPC32XX_UART == 1) || (CONFIG_SYS_LPC32XX_UART == 2) || \
20         (CONFIG_SYS_LPC32XX_UART == 7)
21 #if !defined(CONFIG_LPC32XX_HSUART)
22 #define CONFIG_LPC32XX_HSUART
23 #endif
24 #endif
25
26 #if !defined(CONFIG_SYS_NS16550_CLK)
27 #define CONFIG_SYS_NS16550_CLK          13000000
28 #endif
29
30 #if !defined(CONFIG_LPC32XX_HSUART)
31 #define CONFIG_CONS_INDEX               (CONFIG_SYS_LPC32XX_UART - 2)
32 #else
33 #define CONFIG_CONS_INDEX               CONFIG_SYS_LPC32XX_UART
34 #endif
35
36 #define CONFIG_SYS_BAUDRATE_TABLE       \
37                 { 9600, 19200, 38400, 57600, 115200, 230400, 460800 }
38
39 /* Ethernet */
40 #define LPC32XX_ETH_BASE ETHERNET_BASE
41
42 /* NAND */
43 #if defined(CONFIG_NAND_LPC32XX_SLC)
44 #define NAND_LARGE_BLOCK_PAGE_SIZE      0x800
45 #define NAND_SMALL_BLOCK_PAGE_SIZE      0x200
46
47 #if !defined(CONFIG_SYS_NAND_PAGE_SIZE)
48 #define CONFIG_SYS_NAND_PAGE_SIZE       NAND_LARGE_BLOCK_PAGE_SIZE
49 #endif
50
51 #if (CONFIG_SYS_NAND_PAGE_SIZE == NAND_LARGE_BLOCK_PAGE_SIZE)
52 #define CONFIG_SYS_NAND_OOBSIZE         64
53 #define CONFIG_SYS_NAND_ECCPOS          { 40, 41, 42, 43, 44, 45, 46, 47, \
54                                           48, 49, 50, 51, 52, 53, 54, 55, \
55                                           56, 57, 58, 59, 60, 61, 62, 63, }
56 #define CONFIG_SYS_NAND_BAD_BLOCK_POS   NAND_LARGE_BADBLOCK_POS
57 #elif (CONFIG_SYS_NAND_PAGE_SIZE == NAND_SMALL_BLOCK_PAGE_SIZE)
58 #define CONFIG_SYS_NAND_OOBSIZE         16
59 #define CONFIG_SYS_NAND_ECCPOS          { 10, 11, 12, 13, 14, 15, }
60 #define CONFIG_SYS_NAND_BAD_BLOCK_POS   0
61 #else
62 #error "CONFIG_SYS_NAND_PAGE_SIZE set to an invalid value"
63 #endif
64
65 #define CONFIG_SYS_NAND_ECCSIZE         0x100
66 #define CONFIG_SYS_NAND_ECCBYTES        3
67 #define CONFIG_SYS_NAND_PAGE_COUNT      (CONFIG_SYS_NAND_BLOCK_SIZE / \
68                                                 CONFIG_SYS_NAND_PAGE_SIZE)
69 #endif  /* CONFIG_NAND_LPC32XX_SLC */
70
71 /* NOR Flash */
72 #if defined(CONFIG_SYS_FLASH_CFI)
73 #define CONFIG_FLASH_CFI_DRIVER
74 #define CONFIG_SYS_FLASH_PROTECTION
75 #endif
76
77 /* USB OHCI */
78 #if defined(CONFIG_USB_OHCI_LPC32XX)
79 #define CONFIG_USB_OHCI_NEW
80 #define CONFIG_SYS_USB_OHCI_CPU_INIT
81 #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS      1
82 #define CONFIG_SYS_USB_OHCI_REGS_BASE           USB_BASE
83 #define CONFIG_SYS_USB_OHCI_SLOT_NAME           "lpc32xx-ohci"
84 #endif
85
86 #endif /* _LPC32XX_CONFIG_H */