2 * (C) Copyright 2010 Samsung Electronics
3 * Minkyu Kang <mk7.kang@samsung.com>
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License as
7 * published by the Free Software Foundation; either version 2 of
8 * the License, or (at your option) any later version.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 #ifndef __ASM_ARCH_GPIO_H
22 #define __ASM_ARCH_GPIO_H
25 struct s5p_gpio_bank {
31 unsigned int pdn_pull;
32 unsigned char res1[8];
35 struct exynos4_gpio_part1 {
36 struct s5p_gpio_bank a0;
37 struct s5p_gpio_bank a1;
38 struct s5p_gpio_bank b;
39 struct s5p_gpio_bank c0;
40 struct s5p_gpio_bank c1;
41 struct s5p_gpio_bank d0;
42 struct s5p_gpio_bank d1;
43 struct s5p_gpio_bank e0;
44 struct s5p_gpio_bank e1;
45 struct s5p_gpio_bank e2;
46 struct s5p_gpio_bank e3;
47 struct s5p_gpio_bank e4;
48 struct s5p_gpio_bank f0;
49 struct s5p_gpio_bank f1;
50 struct s5p_gpio_bank f2;
51 struct s5p_gpio_bank f3;
54 struct exynos4_gpio_part2 {
55 struct s5p_gpio_bank j0;
56 struct s5p_gpio_bank j1;
57 struct s5p_gpio_bank k0;
58 struct s5p_gpio_bank k1;
59 struct s5p_gpio_bank k2;
60 struct s5p_gpio_bank k3;
61 struct s5p_gpio_bank l0;
62 struct s5p_gpio_bank l1;
63 struct s5p_gpio_bank l2;
64 struct s5p_gpio_bank y0;
65 struct s5p_gpio_bank y1;
66 struct s5p_gpio_bank y2;
67 struct s5p_gpio_bank y3;
68 struct s5p_gpio_bank y4;
69 struct s5p_gpio_bank y5;
70 struct s5p_gpio_bank y6;
71 struct s5p_gpio_bank res1[80];
72 struct s5p_gpio_bank x0;
73 struct s5p_gpio_bank x1;
74 struct s5p_gpio_bank x2;
75 struct s5p_gpio_bank x3;
78 struct exynos4_gpio_part3 {
79 struct s5p_gpio_bank z;
83 void s5p_gpio_cfg_pin(struct s5p_gpio_bank *bank, int gpio, int cfg);
84 void s5p_gpio_direction_output(struct s5p_gpio_bank *bank, int gpio, int en);
85 void s5p_gpio_direction_input(struct s5p_gpio_bank *bank, int gpio);
86 void s5p_gpio_set_value(struct s5p_gpio_bank *bank, int gpio, int en);
87 unsigned int s5p_gpio_get_value(struct s5p_gpio_bank *bank, int gpio);
88 void s5p_gpio_set_pull(struct s5p_gpio_bank *bank, int gpio, int mode);
89 void s5p_gpio_set_drv(struct s5p_gpio_bank *bank, int gpio, int mode);
90 void s5p_gpio_set_rate(struct s5p_gpio_bank *bank, int gpio, int mode);
92 /* GPIO pins per bank */
93 #define GPIO_PER_BANK 8
95 #define exynos4_gpio_part1_get_nr(bank, pin) \
96 ((((((unsigned int) &(((struct exynos4_gpio_part1 *) \
97 EXYNOS4_GPIO_PART1_BASE)->bank)) \
98 - EXYNOS4_GPIO_PART1_BASE) / sizeof(struct s5p_gpio_bank)) \
99 * GPIO_PER_BANK) + pin)
101 #define GPIO_PART1_MAX ((sizeof(struct exynos4_gpio_part1) \
102 / sizeof(struct s5p_gpio_bank)) * GPIO_PER_BANK)
104 #define exynos4_gpio_part2_get_nr(bank, pin) \
105 (((((((unsigned int) &(((struct exynos4_gpio_part2 *) \
106 EXYNOS4_GPIO_PART2_BASE)->bank)) \
107 - EXYNOS4_GPIO_PART2_BASE) / sizeof(struct s5p_gpio_bank)) \
108 * GPIO_PER_BANK) + pin) + GPIO_PART1_MAX)
110 static inline unsigned int s5p_gpio_base(int nr)
112 if (nr < GPIO_PART1_MAX)
113 return EXYNOS4_GPIO_PART1_BASE;
115 return EXYNOS4_GPIO_PART2_BASE;
122 /* Pin configurations */
123 #define GPIO_INPUT 0x0
124 #define GPIO_OUTPUT 0x1
126 #define GPIO_FUNC(x) (x)
129 #define GPIO_PULL_NONE 0x0
130 #define GPIO_PULL_DOWN 0x1
131 #define GPIO_PULL_UP 0x3
133 /* Drive Strength level */
134 #define GPIO_DRV_1X 0x0
135 #define GPIO_DRV_3X 0x1
136 #define GPIO_DRV_2X 0x2
137 #define GPIO_DRV_4X 0x3
138 #define GPIO_DRV_FAST 0x0
139 #define GPIO_DRV_SLOW 0x1