2 * Copyright (C) 2012 Samsung Electronics
4 * Author: Donghwa Lee <dh09.lee@samsung.com>
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License as
8 * published by the Free Software Foundation; either version 2 of
9 * the License, or (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
25 #define msleep(a) udelay(a * 1000)
27 #define DP_TIMEOUT_LOOP_COUNT 100
31 #define EXYNOS_DP_SUCCESS 0
38 struct edp_disp_info {
42 unsigned int h_sync_width;
43 unsigned int h_back_porch;
44 unsigned int h_front_porch;
47 unsigned int v_sync_width;
48 unsigned int v_back_porch;
49 unsigned int v_front_porch;
51 unsigned int v_sync_rate;
54 struct edp_link_train_info {
55 unsigned int lt_status;
58 unsigned int cr_loop[4];
62 struct edp_video_info {
63 unsigned int master_mode;
64 unsigned int bist_mode;
65 unsigned int bist_pattern;
67 unsigned int h_sync_polarity;
68 unsigned int v_sync_polarity;
69 unsigned int interlaced;
71 unsigned int color_space;
72 unsigned int dynamic_range;
73 unsigned int ycbcr_coeff;
74 unsigned int color_depth;
77 struct edp_device_info {
78 struct edp_disp_info disp_info;
79 struct edp_link_train_info lt_info;
80 struct edp_video_info video_info;
82 /*below info get from panel during training*/
83 unsigned char lane_bw;
84 unsigned char lane_cnt;
85 unsigned char dpcd_rev;
86 /*support enhanced frame cap */
87 unsigned char dpcd_efc;
90 enum analog_power_block {
129 DP_LANE_BW_1_62 = 0x06,
130 DP_LANE_BW_2_70 = 0x0a,
140 DP_DPCD_REV_10 = 0x10,
141 DP_DPCD_REV_11 = 0x11,
154 PRE_EMPHASIS_LEVEL_0,
155 PRE_EMPHASIS_LEVEL_1,
156 PRE_EMPHASIS_LEVEL_2,
157 PRE_EMPHASIS_LEVEL_3,
183 WHITE_GRAY_BALCKBAR_32,
184 WHITE_GRAY_BALCKBAR_64,
195 VIDEO_TIMING_FROM_CAPTURE,
196 VIDEO_TIMING_FROM_REGISTER
200 struct exynos_dp_platform_data {
201 struct edp_device_info *edp_dev_info;
202 void (*phy_enable)(unsigned int);
205 #ifdef CONFIG_EXYNOS_DP
206 unsigned int exynos_init_dp(void);
208 unsigned int exynos_init_dp(void)
214 void exynos_set_dp_platform_data(struct exynos_dp_platform_data *pd);
216 #endif /* _DP_INFO_H */