2 * (C) Copyright 2010 Samsung Electronics
3 * Minkyu Kang <mk7.kang@samsung.com>
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License as
7 * published by the Free Software Foundation; either version 2 of
8 * the License, or (at your option) any later version.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
22 #ifndef _EXYNOS4_CPU_H
23 #define _EXYNOS4_CPU_H
25 #define DEVICE_NOT_AVAILABLE 0
27 #define EXYNOS4_ADDR_BASE 0x10000000
30 #define EXYNOS4_GPIO_PART3_BASE 0x03860000
31 #define EXYNOS4_PRO_ID 0x10000000
32 #define EXYNOS4_POWER_BASE 0x10020000
33 #define EXYNOS4_SWRESET 0x10020400
34 #define EXYNOS4_CLOCK_BASE 0x10030000
35 #define EXYNOS4_SYSTIMER_BASE 0x10050000
36 #define EXYNOS4_WATCHDOG_BASE 0x10060000
37 #define EXYNOS4_MIU_BASE 0x10600000
38 #define EXYNOS4_DMC0_BASE 0x10400000
39 #define EXYNOS4_DMC1_BASE 0x10410000
40 #define EXYNOS4_GPIO_PART2_BASE 0x11000000
41 #define EXYNOS4_GPIO_PART1_BASE 0x11400000
42 #define EXYNOS4_FIMD_BASE 0x11C00000
43 #define EXYNOS4_USBOTG_BASE 0x12480000
44 #define EXYNOS4_MMC_BASE 0x12510000
45 #define EXYNOS4_SROMC_BASE 0x12570000
46 #define EXYNOS4_USBPHY_BASE 0x125B0000
47 #define EXYNOS4_UART_BASE 0x13800000
48 #define EXYNOS4_ADC_BASE 0x13910000
49 #define EXYNOS4_PWMTIMER_BASE 0x139D0000
50 #define EXYNOS4_MODEM_BASE 0x13A00000
51 #define EXYNOS4_USBPHY_CONTROL 0x10020704
53 #define EXYNOS4_GPIO_PART4_BASE DEVICE_NOT_AVAILABLE
56 #define EXYNOS5_GPIO_PART4_BASE 0x03860000
57 #define EXYNOS5_PRO_ID 0x10000000
58 #define EXYNOS5_CLOCK_BASE 0x10010000
59 #define EXYNOS5_POWER_BASE 0x10040000
60 #define EXYNOS5_SWRESET 0x10040400
61 #define EXYNOS5_SYSREG_BASE 0x10050000
62 #define EXYNOS5_WATCHDOG_BASE 0x101D0000
63 #define EXYNOS5_DMC_PHY0_BASE 0x10C00000
64 #define EXYNOS5_DMC_PHY1_BASE 0x10C10000
65 #define EXYNOS5_GPIO_PART3_BASE 0x10D10000
66 #define EXYNOS5_DMC_CTRL_BASE 0x10DD0000
67 #define EXYNOS5_GPIO_PART1_BASE 0x11400000
68 #define EXYNOS5_MMC_BASE 0x12200000
69 #define EXYNOS5_SROMC_BASE 0x12250000
70 #define EXYNOS5_USBOTG_BASE 0x12480000
71 #define EXYNOS5_USBPHY_BASE 0x12480000
72 #define EXYNOS5_UART_BASE 0x12C00000
73 #define EXYNOS5_PWMTIMER_BASE 0x12DD0000
74 #define EXYNOS5_GPIO_PART2_BASE 0x13400000
75 #define EXYNOS5_FIMD_BASE 0x14400000
77 #define EXYNOS5_ADC_BASE DEVICE_NOT_AVAILABLE
78 #define EXYNOS5_MODEM_BASE DEVICE_NOT_AVAILABLE
82 /* CPU detection macros */
83 extern unsigned int s5p_cpu_id;
84 extern unsigned int s5p_cpu_rev;
86 static inline int s5p_get_cpu_rev(void)
91 static inline void s5p_set_cpu_id(void)
93 s5p_cpu_id = readl(EXYNOS4_PRO_ID);
94 s5p_cpu_id = (0xC000 | ((s5p_cpu_id & 0x00FFF000) >> 12));
97 * 0xC200: EXYNOS4210 EVT0
98 * 0xC210: EXYNOS4210 EVT1
100 if (s5p_cpu_id == 0xC200) {
103 } else if (s5p_cpu_id == 0xC210) {
108 #define IS_SAMSUNG_TYPE(type, id) \
109 static inline int cpu_is_##type(void) \
111 return s5p_cpu_id == id ? 1 : 0; \
114 IS_SAMSUNG_TYPE(exynos4, 0xc210)
115 IS_SAMSUNG_TYPE(exynos5, 0xc520)
117 #define SAMSUNG_BASE(device, base) \
118 static inline unsigned int samsung_get_base_##device(void) \
120 if (cpu_is_exynos4()) \
121 return EXYNOS4_##base; \
122 else if (cpu_is_exynos5()) \
123 return EXYNOS5_##base; \
128 SAMSUNG_BASE(adc, ADC_BASE)
129 SAMSUNG_BASE(clock, CLOCK_BASE)
130 SAMSUNG_BASE(fimd, FIMD_BASE)
131 SAMSUNG_BASE(gpio_part1, GPIO_PART1_BASE)
132 SAMSUNG_BASE(gpio_part2, GPIO_PART2_BASE)
133 SAMSUNG_BASE(gpio_part3, GPIO_PART3_BASE)
134 SAMSUNG_BASE(gpio_part4, GPIO_PART4_BASE)
135 SAMSUNG_BASE(pro_id, PRO_ID)
136 SAMSUNG_BASE(mmc, MMC_BASE)
137 SAMSUNG_BASE(modem, MODEM_BASE)
138 SAMSUNG_BASE(sromc, SROMC_BASE)
139 SAMSUNG_BASE(swreset, SWRESET)
140 SAMSUNG_BASE(timer, PWMTIMER_BASE)
141 SAMSUNG_BASE(uart, UART_BASE)
142 SAMSUNG_BASE(usb_phy, USBPHY_BASE)
143 SAMSUNG_BASE(usb_otg, USBOTG_BASE)
144 SAMSUNG_BASE(watchdog, WATCHDOG_BASE)
145 SAMSUNG_BASE(power, POWER_BASE)
148 #endif /* _EXYNOS4_CPU_H */