2 * Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net>
6 * ----------------------------------------------------------------------------
10 * TI DaVinci (DM644X) EMAC peripheral driver header for DV-EVM
12 * Copyright (C) 2005 Texas Instruments.
14 * ----------------------------------------------------------------------------
16 * This program is free software; you can redistribute it and/or modify
17 * it under the terms of the GNU General Public License as published by
18 * the Free Software Foundation; either version 2 of the License, or
19 * (at your option) any later version.
21 * This program is distributed in the hope that it will be useful,
22 * but WITHOUT ANY WARRANTY; without even the implied warranty of
23 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
24 * GNU General Public License for more details.
26 * You should have received a copy of the GNU General Public License
27 * along with this program; if not, write to the Free Software
28 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
29 * ----------------------------------------------------------------------------
32 * ver. 1.0: Sep 2005, TI PSP Team - Created EMAC version for uBoot.
36 #ifndef _DM644X_EMAC_H_
37 #define _DM644X_EMAC_H_
39 #include <asm/arch/hardware.h>
41 #ifdef CONFIG_SOC_DM365
42 #define EMAC_BASE_ADDR (0x01d07000)
43 #define EMAC_WRAPPER_BASE_ADDR (0x01d0a000)
44 #define EMAC_WRAPPER_RAM_ADDR (0x01d08000)
45 #define EMAC_MDIO_BASE_ADDR (0x01d0b000)
46 #define DAVINCI_EMAC_VERSION2
47 #elif defined(CONFIG_SOC_DA8XX)
48 #define EMAC_BASE_ADDR DAVINCI_EMAC_CNTRL_REGS_BASE
49 #define EMAC_WRAPPER_BASE_ADDR DAVINCI_EMAC_WRAPPER_CNTRL_REGS_BASE
50 #define EMAC_WRAPPER_RAM_ADDR DAVINCI_EMAC_WRAPPER_RAM_BASE
51 #define EMAC_MDIO_BASE_ADDR DAVINCI_MDIO_CNTRL_REGS_BASE
52 #define DAVINCI_EMAC_VERSION2
54 #define EMAC_BASE_ADDR (0x01c80000)
55 #define EMAC_WRAPPER_BASE_ADDR (0x01c81000)
56 #define EMAC_WRAPPER_RAM_ADDR (0x01c82000)
57 #define EMAC_MDIO_BASE_ADDR (0x01c84000)
60 #ifdef CONFIG_SOC_DM646X
61 #define DAVINCI_EMAC_VERSION2
62 #define DAVINCI_EMAC_GIG_ENABLE
65 #ifdef CONFIG_SOC_DM646X
66 /* MDIO module input frequency */
67 #define EMAC_MDIO_BUS_FREQ 76500000
68 /* MDIO clock output frequency */
69 #define EMAC_MDIO_CLOCK_FREQ 2500000 /* 2.5 MHz */
70 #elif defined(CONFIG_SOC_DM365)
71 /* MDIO module input frequency */
72 #define EMAC_MDIO_BUS_FREQ 121500000
73 /* MDIO clock output frequency */
74 #define EMAC_MDIO_CLOCK_FREQ 2200000 /* 2.2 MHz */
75 #elif defined(CONFIG_SOC_DA8XX)
76 /* MDIO module input frequency */
77 #define EMAC_MDIO_BUS_FREQ clk_get(DAVINCI_MDIO_CLKID)
78 /* MDIO clock output frequency */
79 #define EMAC_MDIO_CLOCK_FREQ 2000000 /* 2.0 MHz */
81 /* MDIO module input frequency */
82 #define EMAC_MDIO_BUS_FREQ 99000000 /* PLL/6 - 99 MHz */
83 /* MDIO clock output frequency */
84 #define EMAC_MDIO_CLOCK_FREQ 2000000 /* 2.0 MHz */
87 #define PHY_KSZ8873 (0x00221450)
88 int ksz8873_is_phy_connected(int phy_addr);
89 int ksz8873_get_link_speed(int phy_addr);
90 int ksz8873_init_phy(int phy_addr);
91 int ksz8873_auto_negotiate(int phy_addr);
93 #define PHY_LXT972 (0x001378e2)
94 int lxt972_is_phy_connected(int phy_addr);
95 int lxt972_get_link_speed(int phy_addr);
96 int lxt972_init_phy(int phy_addr);
97 int lxt972_auto_negotiate(int phy_addr);
99 #define PHY_DP83848 (0x20005c90)
100 int dp83848_is_phy_connected(int phy_addr);
101 int dp83848_get_link_speed(int phy_addr);
102 int dp83848_init_phy(int phy_addr);
103 int dp83848_auto_negotiate(int phy_addr);
105 #define PHY_ET1011C (0x282f013)
106 int et1011c_get_link_speed(int phy_addr);
108 #endif /* _DM644X_EMAC_H_ */