2 * [origin: Linux kernel include/asm-arm/arch-at91/at91sam9rl.h]
4 * Copyright (C) 2007 Atmel Corporation
7 * Based on AT91SAM9RL datasheet revision A. (Preliminary)
9 * This file is subject to the terms and conditions of the GNU General Public
10 * License. See the file COPYING in the main directory of this archive for
18 * defines to be used in other places
20 #define CONFIG_ARM926EJS /* ARM926EJS Core */
21 #define CONFIG_AT91FAMILY /* it's a member of AT91 */
24 * Peripheral identifiers/interrupts.
26 #define ATMEL_ID_FIQ 0 /* Advanced Interrupt Controller (FIQ) */
27 #define ATMEL_ID_SYS 1 /* System Peripherals */
28 #define ATMEL_ID_PIOA 2 /* Parallel IO Controller A */
29 #define ATMEL_ID_PIOB 3 /* Parallel IO Controller B */
30 #define ATMEL_ID_PIOC 4 /* Parallel IO Controller C */
31 #define ATMEL_ID_PIOD 5 /* Parallel IO Controller D */
32 #define ATMEL_ID_USART0 6 /* USART 0 */
33 #define ATMEL_ID_USART1 7 /* USART 1 */
34 #define ATMEL_ID_USART2 8 /* USART 2 */
35 #define ATMEL_ID_USART3 9 /* USART 3 */
36 #define ATMEL_ID_MCI 10 /* Multimedia Card Interface */
37 #define ATMEL_ID_TWI0 11 /* TWI 0 */
38 #define ATMEL_ID_TWI1 12 /* TWI 1 */
39 #define ATMEL_ID_SPI 13 /* Serial Peripheral Interface */
40 #define ATMEL_ID_SSC0 14 /* Serial Synchronous Controller 0 */
41 #define ATMEL_ID_SSC1 15 /* Serial Synchronous Controller 1 */
42 #define ATMEL_ID_TC0 16 /* Timer Counter 0 */
43 #define ATMEL_ID_TC1 17 /* Timer Counter 1 */
44 #define ATMEL_ID_TC2 18 /* Timer Counter 2 */
45 #define ATMEL_ID_PWMC 19 /* Pulse Width Modulation Controller */
46 #define ATMEL_ID_TSC 20 /* Touch Screen Controller */
47 #define ATMEL_ID_DMA 21 /* DMA Controller */
48 #define ATMEL_ID_UDPHS 22 /* USB Device HS */
49 #define ATMEL_ID_LCDC 23 /* LCD Controller */
50 #define ATMEL_ID_AC97C 24 /* AC97 Controller */
51 #define ATMEL_ID_IRQ0 31 /* Advanced Interrupt Controller (IRQ0) */
54 * User Peripheral physical base addresses.
56 #define ATMEL_BASE_TCB0 0xfffa0000
57 #define ATMEL_BASE_TC0 0xfffa0000
58 #define ATMEL_BASE_TC1 0xfffa0040
59 #define ATMEL_BASE_TC2 0xfffa0080
60 #define ATMEL_BASE_MCI 0xfffa4000
61 #define ATMEL_BASE_TWI0 0xfffa8000
62 #define ATMEL_BASE_TWI1 0xfffac000
63 #define ATMEL_BASE_USART0 0xfffb0000
64 #define ATMEL_BASE_USART1 0xfffb4000
65 #define ATMEL_BASE_USART2 0xfffb8000
66 #define ATMEL_BASE_USART3 0xfffbc000
67 #define ATMEL_BASE_SSC0 0xfffc0000
68 #define ATMEL_BASE_SSC1 0xfffc4000
69 #define ATMEL_BASE_PWMC 0xfffc8000
70 #define ATMEL_BASE_SPI0 0xfffcc000
71 #define ATMEL_BASE_TSC 0xfffd0000
72 #define ATMEL_BASE_UDPHS 0xfffd4000
73 #define ATMEL_BASE_AC97C 0xfffd8000
74 #define ATMEL_BASE_SYS 0xffffc000
79 #define ATMEL_BASE_DMA 0xffffe600
80 #define ATMEL_BASE_ECC 0xffffe800
81 #define ATMEL_BASE_SDRAMC 0xffffea00
82 #define ATMEL_BASE_SMC 0xffffec00
83 #define ATMEL_BASE_MATRIX 0xffffee00
84 #define ATMEL_BASE_CCFG 0xffffef10
85 #define ATMEL_BASE_AIC 0xfffff000
86 #define ATMEL_BASE_DBGU 0xfffff200
87 #define ATMEL_BASE_PIOA 0xfffff400
88 #define ATMEL_BASE_PIOB 0xfffff600
89 #define ATMEL_BASE_PIOC 0xfffff800
90 #define ATMEL_BASE_PIOD 0xfffffa00
91 #define ATMEL_BASE_PMC 0xfffffc00
92 #define ATMEL_BASE_RSTC 0xfffffd00
93 #define ATMEL_BASE_SHDWC 0xfffffd10
94 #define ATMEL_BASE_RTT 0xfffffd20
95 #define ATMEL_BASE_PIT 0xfffffd30
96 #define ATMEL_BASE_WDT 0xfffffd40
97 #define ATMEL_BASE_SCKCR 0xfffffd50
98 #define ATMEL_BASE_GPBR 0xfffffd60
99 #define ATMEL_BASE_RTC 0xfffffe00
104 #define ATMEL_BASE_SRAM 0x00300000 /* Internal SRAM base address */
105 #define ATMEL_BASE_ROM 0x00400000 /* Internal ROM base address */
107 #define ATMEL_BASE_LCDC 0x00500000 /* LCD Controller */
108 #define ATMEL_UHP_BASE 0x00600000 /* USB Device HS controller */
113 #define ATMEL_BASE_CS0 0x10000000
114 #define ATMEL_BASE_CS1 0x20000000 /* SDRAM */
115 #define ATMEL_BASE_CS2 0x30000000
116 #define ATMEL_BASE_CS3 0x40000000 /* NAND */
117 #define ATMEL_BASE_CS4 0x50000000 /* Compact Flash Slot 0 */
118 #define ATMEL_BASE_CS5 0x60000000 /* Compact Flash Slot 1 */
123 #define ATMEL_PIO_PORTS 4 /* this SoC has 4 PIO */
124 #define ATMEL_BASE_PIO ATMEL_BASE_PIOA
129 #define ATMEL_CPU_NAME "AT91SAM9RL"