2 * Copyright 2015 Freescale Semiconductor, Inc.
4 * SPDX-License-Identifier: GPL-2.0+
8 #include <asm/arch/imx-regs.h>
9 #include <asm/arch/clock.h>
10 #include <asm/arch/sys_proto.h>
11 #include <asm/imx-common/boot_mode.h>
12 #include <asm/arch/crm_regs.h>
16 struct aipstz_regs *aips1, *aips2;
18 struct aipstz_regs *aips3;
21 aips1 = (struct aipstz_regs *)AIPS1_BASE_ADDR;
22 aips2 = (struct aipstz_regs *)AIPS2_BASE_ADDR;
24 aips3 = (struct aipstz_regs *)AIPS3_BASE_ADDR;
28 * Set all MPROTx to be non-bufferable, trusted for R/W,
29 * not forced to user-mode.
31 writel(0x77777777, &aips1->mprot0);
32 writel(0x77777777, &aips1->mprot1);
33 writel(0x77777777, &aips2->mprot0);
34 writel(0x77777777, &aips2->mprot1);
37 * Set all OPACRx to be non-bufferable, not require
38 * supervisor privilege level for access,allow for
39 * write access and untrusted master access.
41 writel(0x00000000, &aips1->opacr0);
42 writel(0x00000000, &aips1->opacr1);
43 writel(0x00000000, &aips1->opacr2);
44 writel(0x00000000, &aips1->opacr3);
45 writel(0x00000000, &aips1->opacr4);
46 writel(0x00000000, &aips2->opacr0);
47 writel(0x00000000, &aips2->opacr1);
48 writel(0x00000000, &aips2->opacr2);
49 writel(0x00000000, &aips2->opacr3);
50 writel(0x00000000, &aips2->opacr4);
54 * Set all MPROTx to be non-bufferable, trusted for R/W,
55 * not forced to user-mode.
57 writel(0x77777777, &aips3->mprot0);
58 writel(0x77777777, &aips3->mprot1);
61 * Set all OPACRx to be non-bufferable, not require
62 * supervisor privilege level for access,allow for
63 * write access and untrusted master access.
65 writel(0x00000000, &aips3->opacr0);
66 writel(0x00000000, &aips3->opacr1);
67 writel(0x00000000, &aips3->opacr2);
68 writel(0x00000000, &aips3->opacr3);
69 writel(0x00000000, &aips3->opacr4);
73 #define SRC_SCR_WARM_RESET_ENABLE 0
77 struct src *src_regs = (struct src *)SRC_BASE_ADDR;
81 * force warm reset sources to generate cold reset
82 * for a more reliable restart
84 val = readl(&src_regs->scr);
85 val &= ~(1 << SRC_SCR_WARM_RESET_ENABLE);
86 writel(val, &src_regs->scr);
89 void boot_mode_apply(unsigned cfg_val)
92 struct src *psrc = (struct src *)SRC_BASE_ADDR;
93 writel(cfg_val, &psrc->gpr9);
94 reg = readl(&psrc->gpr10);
99 writel(reg, &psrc->gpr10);