2 * dts file for Xilinx ZynqMP
4 * (C) Copyright 2014 - 2015, Xilinx, Inc.
6 * Michal Simek <michal.simek@xilinx.com>
8 * SPDX-License-Identifier: GPL-2.0+
11 compatible = "xlnx,zynqmp";
20 compatible = "arm,cortex-a53", "arm,armv8";
22 enable-method = "psci";
27 compatible = "arm,cortex-a53", "arm,armv8";
29 enable-method = "psci";
34 compatible = "arm,cortex-a53", "arm,armv8";
36 enable-method = "psci";
41 compatible = "arm,cortex-a53", "arm,armv8";
43 enable-method = "psci";
49 compatible = "arm,dcc";
55 compatible = "xlnx,zynqmp-genpd";
58 #power-domain-cells = <0x0>;
63 #power-domain-cells = <0x0>;
68 #power-domain-cells = <0x0>;
73 #power-domain-cells = <0x0>;
78 #power-domain-cells = <0x0>;
83 #power-domain-cells = <0x0>;
88 #power-domain-cells = <0x0>;
93 #power-domain-cells = <0x0>;
98 #power-domain-cells = <0x0>;
103 #power-domain-cells = <0x0>;
108 #power-domain-cells = <0x0>;
113 #power-domain-cells = <0x0>;
118 #power-domain-cells = <0x0>;
123 /* fixme: what to attach to */
124 #power-domain-cells = <0x0>;
129 #power-domain-cells = <0x0>;
134 #power-domain-cells = <0x0>;
139 #power-domain-cells = <0x0>;
144 #power-domain-cells = <0x0>;
149 #power-domain-cells = <0x0>;
154 #power-domain-cells = <0x0>;
159 #power-domain-cells = <0x0>;
164 #power-domain-cells = <0x0>;
169 #power-domain-cells = <0x0>;
174 #power-domain-cells = <0x0>;
179 #power-domain-cells = <0x0>;
184 #power-domain-cells = <0x0>;
189 #power-domain-cells = <0x0>;
194 #power-domain-cells = <0x0>;
199 #power-domain-cells = <0x0>;
204 #power-domain-cells = <0x0>;
209 #power-domain-cells = <0x0>;
214 #power-domain-cells = <0x0>;
220 compatible = "arm,armv8-pmuv3";
221 interrupt-parent = <&gic>;
222 interrupts = <0 143 4>,
229 compatible = "arm,psci-0.2";
234 compatible = "xlnx,zynqmp-pm";
239 compatible = "arm,armv8-timer";
240 interrupt-parent = <&gic>;
241 interrupts = <1 13 0xf01>,
247 amba_apu: amba_apu@0 {
248 compatible = "simple-bus";
249 #address-cells = <2>;
251 ranges = <0 0 0 0 0xffffffff>;
253 gic: interrupt-controller@f9010000 {
254 compatible = "arm,gic-400", "arm,cortex-a15-gic";
255 #interrupt-cells = <3>;
256 reg = <0x0 0xf9010000 0x10000>,
257 <0x0 0xf9020000 0x20000>,
258 <0x0 0xf9040000 0x20000>,
259 <0x0 0xf9060000 0x20000>;
260 interrupt-controller;
261 interrupt-parent = <&gic>;
262 interrupts = <1 9 0xf04>;
267 compatible = "simple-bus";
269 #address-cells = <2>;
271 ranges = <0 0 0 0 0xffffffff>;
274 compatible = "xlnx,zynq-can-1.0";
276 clock-names = "can_clk", "pclk";
277 reg = <0x0 0xff060000 0x1000>;
278 interrupts = <0 23 4>;
279 interrupt-parent = <&gic>;
280 tx-fifo-depth = <0x40>;
281 rx-fifo-depth = <0x40>;
282 power-domains = <&pd_can0>;
286 compatible = "xlnx,zynq-can-1.0";
288 clock-names = "can_clk", "pclk";
289 reg = <0x0 0xff070000 0x1000>;
290 interrupts = <0 24 4>;
291 interrupt-parent = <&gic>;
292 tx-fifo-depth = <0x40>;
293 rx-fifo-depth = <0x40>;
294 power-domains = <&pd_can1>;
298 compatible = "arm,cci-400";
299 reg = <0x0 0xfd6e0000 0x9000>;
300 ranges = <0x0 0x0 0xfd6e0000 0x10000>;
301 #address-cells = <1>;
305 compatible = "arm,cci-400-pmu,r1";
306 reg = <0x9000 0x5000>;
307 interrupt-parent = <&gic>;
308 interrupts = <0 123 4>,
317 fpd_dma_chan1: dma@fd500000 {
319 compatible = "xlnx,zynqmp-dma-1.0";
320 reg = <0x0 0xfd500000 0x1000>;
321 interrupt-parent = <&gic>;
322 interrupts = <0 124 4>;
323 clock-names = "clk_main", "clk_apb";
325 xlnx,bus-width = <128>;
326 power-domains = <&pd_gdma>;
329 fpd_dma_chan2: dma@fd510000 {
331 compatible = "xlnx,zynqmp-dma-1.0";
332 reg = <0x0 0xfd510000 0x1000>;
333 interrupt-parent = <&gic>;
334 interrupts = <0 125 4>;
335 clock-names = "clk_main", "clk_apb";
337 xlnx,bus-width = <128>;
338 power-domains = <&pd_gdma>;
341 fpd_dma_chan3: dma@fd520000 {
343 compatible = "xlnx,zynqmp-dma-1.0";
344 reg = <0x0 0xfd520000 0x1000>;
345 interrupt-parent = <&gic>;
346 interrupts = <0 126 4>;
347 clock-names = "clk_main", "clk_apb";
349 xlnx,bus-width = <128>;
350 power-domains = <&pd_gdma>;
353 fpd_dma_chan4: dma@fd530000 {
355 compatible = "xlnx,zynqmp-dma-1.0";
356 reg = <0x0 0xfd530000 0x1000>;
357 interrupt-parent = <&gic>;
358 interrupts = <0 127 4>;
359 clock-names = "clk_main", "clk_apb";
361 xlnx,bus-width = <128>;
362 power-domains = <&pd_gdma>;
365 fpd_dma_chan5: dma@fd540000 {
367 compatible = "xlnx,zynqmp-dma-1.0";
368 reg = <0x0 0xfd540000 0x1000>;
369 interrupt-parent = <&gic>;
370 interrupts = <0 128 4>;
371 clock-names = "clk_main", "clk_apb";
373 xlnx,bus-width = <128>;
374 power-domains = <&pd_gdma>;
377 fpd_dma_chan6: dma@fd550000 {
379 compatible = "xlnx,zynqmp-dma-1.0";
380 reg = <0x0 0xfd550000 0x1000>;
381 interrupt-parent = <&gic>;
382 interrupts = <0 129 4>;
383 clock-names = "clk_main", "clk_apb";
385 xlnx,bus-width = <128>;
386 power-domains = <&pd_gdma>;
389 fpd_dma_chan7: dma@fd560000 {
391 compatible = "xlnx,zynqmp-dma-1.0";
392 reg = <0x0 0xfd560000 0x1000>;
393 interrupt-parent = <&gic>;
394 interrupts = <0 130 4>;
395 clock-names = "clk_main", "clk_apb";
397 xlnx,bus-width = <128>;
398 power-domains = <&pd_gdma>;
401 fpd_dma_chan8: dma@fd570000 {
403 compatible = "xlnx,zynqmp-dma-1.0";
404 reg = <0x0 0xfd570000 0x1000>;
405 interrupt-parent = <&gic>;
406 interrupts = <0 131 4>;
407 clock-names = "clk_main", "clk_apb";
409 xlnx,bus-width = <128>;
410 power-domains = <&pd_gdma>;
415 compatible = "arm,mali-400", "arm,mali-utgard";
416 reg = <0x0 0xfd4b0000 0x30000>;
417 interrupt-parent = <&gic>;
418 interrupts = <0 132 4>, <0 132 4>, <0 132 4>, <0 132 4>, <0 132 4>, <0 132 4>;
419 interrupt-names = "IRQGP", "IRQGPMMU", "IRQPP0", "IRQPPMMU0", "IRQPP1", "IRQPPMMU1";
423 lpd_dma_chan1: dma@ffa80000 {
425 compatible = "xlnx,zynqmp-dma-1.0";
426 reg = <0x0 0xffa80000 0x1000>;
427 interrupt-parent = <&gic>;
428 interrupts = <0 77 4>;
430 xlnx,bus-width = <64>;
431 power-domains = <&pd_adma>;
434 lpd_dma_chan2: dma@ffa90000 {
436 compatible = "xlnx,zynqmp-dma-1.0";
437 reg = <0x0 0xffa90000 0x1000>;
438 interrupt-parent = <&gic>;
439 interrupts = <0 78 4>;
441 xlnx,bus-width = <64>;
442 power-domains = <&pd_adma>;
445 lpd_dma_chan3: dma@ffaa0000 {
447 compatible = "xlnx,zynqmp-dma-1.0";
448 reg = <0x0 0xffaa0000 0x1000>;
449 interrupt-parent = <&gic>;
450 interrupts = <0 79 4>;
452 xlnx,bus-width = <64>;
453 power-domains = <&pd_adma>;
456 lpd_dma_chan4: dma@ffab0000 {
458 compatible = "xlnx,zynqmp-dma-1.0";
459 reg = <0x0 0xffab0000 0x1000>;
460 interrupt-parent = <&gic>;
461 interrupts = <0 80 4>;
463 xlnx,bus-width = <64>;
464 power-domains = <&pd_adma>;
467 lpd_dma_chan5: dma@ffac0000 {
469 compatible = "xlnx,zynqmp-dma-1.0";
470 reg = <0x0 0xffac0000 0x1000>;
471 interrupt-parent = <&gic>;
472 interrupts = <0 81 4>;
474 xlnx,bus-width = <64>;
475 power-domains = <&pd_adma>;
478 lpd_dma_chan6: dma@ffad0000 {
480 compatible = "xlnx,zynqmp-dma-1.0";
481 reg = <0x0 0xffad0000 0x1000>;
482 interrupt-parent = <&gic>;
483 interrupts = <0 82 4>;
485 xlnx,bus-width = <64>;
486 power-domains = <&pd_adma>;
489 lpd_dma_chan7: dma@ffae0000 {
491 compatible = "xlnx,zynqmp-dma-1.0";
492 reg = <0x0 0xffae0000 0x1000>;
493 interrupt-parent = <&gic>;
494 interrupts = <0 83 4>;
496 xlnx,bus-width = <64>;
497 power-domains = <&pd_adma>;
500 lpd_dma_chan8: dma@ffaf0000 {
502 compatible = "xlnx,zynqmp-dma-1.0";
503 reg = <0x0 0xffaf0000 0x1000>;
504 interrupt-parent = <&gic>;
505 interrupts = <0 84 4>;
507 xlnx,bus-width = <64>;
508 power-domains = <&pd_adma>;
511 mc: memory-controller@fd070000 {
512 compatible = "xlnx,zynqmp-ddrc-2.40a";
513 reg = <0x0 0xfd070000 0x30000>;
514 interrupt-parent = <&gic>;
515 interrupts = <0 112 4>;
518 nand0: nand@ff100000 {
519 compatible = "arasan,nfc-v3p10";
521 reg = <0x0 0xff100000 0x1000>;
522 clock-names = "clk_sys", "clk_flash";
523 interrupt-parent = <&gic>;
524 interrupts = <0 14 4>;
525 #address-cells = <2>;
527 power-domains = <&pd_nand>;
530 gem0: ethernet@ff0b0000 {
531 compatible = "cdns,zynqmp-gem";
533 interrupt-parent = <&gic>;
534 interrupts = <0 57 4>, <0 57 4>;
535 reg = <0x0 0xff0b0000 0x1000>;
536 clock-names = "pclk", "hclk", "tx_clk";
537 #address-cells = <1>;
539 #stream-id-cells = <1>;
540 power-domains = <&pd_eth0>;
543 gem1: ethernet@ff0c0000 {
544 compatible = "cdns,zynqmp-gem";
546 interrupt-parent = <&gic>;
547 interrupts = <0 59 4>, <0 59 4>;
548 reg = <0x0 0xff0c0000 0x1000>;
549 clock-names = "pclk", "hclk", "tx_clk";
550 #address-cells = <1>;
552 #stream-id-cells = <1>;
553 power-domains = <&pd_eth1>;
556 gem2: ethernet@ff0d0000 {
557 compatible = "cdns,zynqmp-gem";
559 interrupt-parent = <&gic>;
560 interrupts = <0 61 4>, <0 61 4>;
561 reg = <0x0 0xff0d0000 0x1000>;
562 clock-names = "pclk", "hclk", "tx_clk";
563 #address-cells = <1>;
565 #stream-id-cells = <1>;
566 power-domains = <&pd_eth2>;
569 gem3: ethernet@ff0e0000 {
570 compatible = "cdns,zynqmp-gem";
572 interrupt-parent = <&gic>;
573 interrupts = <0 63 4>, <0 63 4>;
574 reg = <0x0 0xff0e0000 0x1000>;
575 clock-names = "pclk", "hclk", "tx_clk";
576 #address-cells = <1>;
578 #stream-id-cells = <1>;
579 power-domains = <&pd_eth3>;
582 gpio: gpio@ff0a0000 {
583 compatible = "xlnx,zynqmp-gpio-1.0";
586 #interrupt-cells = <2>;
587 interrupt-controller;
588 interrupt-parent = <&gic>;
589 interrupts = <0 16 4>;
590 reg = <0x0 0xff0a0000 0x1000>;
591 power-domains = <&pd_gpio>;
595 compatible = "cdns,i2c-r1p10";
597 interrupt-parent = <&gic>;
598 interrupts = <0 17 4>;
599 reg = <0x0 0xff020000 0x1000>;
600 #address-cells = <1>;
602 power-domains = <&pd_i2c0>;
606 compatible = "cdns,i2c-r1p10";
608 interrupt-parent = <&gic>;
609 interrupts = <0 18 4>;
610 reg = <0x0 0xff030000 0x1000>;
611 #address-cells = <1>;
613 power-domains = <&pd_i2c1>;
616 pcie: pcie@fd0e0000 {
617 compatible = "xlnx,nwl-pcie-2.11";
619 #address-cells = <3>;
621 #interrupt-cells = <1>;
623 interrupt-parent = <&gic>;
624 interrupts = <0 118 4>,
626 <0 115 4>, /* MSI_1 [63...32] */
627 <0 114 4>; /* MSI_0 [31...0] */
628 interrupt-names = "misc", "intx", "msi_1", "msi_0";
629 reg = <0x0 0xfd0e0000 0x1000>,
630 <0x0 0xfd480000 0x1000>,
631 <0x0 0xe0000000 0x1000000>;
632 reg-names = "breg", "pcireg", "cfg";
633 ranges = <0x02000000 0x00000000 0xe1000000 0x00000000 0xe1000000 0 0x0f000000>;
634 interrupt-map-mask = <0x0 0x0 0x0 0x7>;
635 interrupt-map = <0x0 0x0 0x0 0x1 &pcie_intc 0x1>,
636 <0x0 0x0 0x0 0x2 &pcie_intc 0x2>,
637 <0x0 0x0 0x0 0x3 &pcie_intc 0x3>,
638 <0x0 0x0 0x0 0x4 &pcie_intc 0x4>;
639 pcie_intc: legacy-interrupt-controller {
640 interrupt-controller;
641 #address-cells = <0>;
642 #interrupt-cells = <1>;
647 compatible = "xlnx,zynqmp-qspi-1.0";
649 clock-names = "ref_clk", "pclk";
650 interrupts = <0 15 4>;
651 interrupt-parent = <&gic>;
653 reg = <0x0 0xff0f0000 0x1000>,
654 <0x0 0xc0000000 0x8000000>;
655 #address-cells = <1>;
657 power-domains = <&pd_qspi>;
661 compatible = "xlnx,zynqmp-rtc";
663 reg = <0x0 0xffa60000 0x100>;
664 interrupt-parent = <&gic>;
665 interrupts = <0 26 4>, <0 27 4>;
666 interrupt-names = "alarm", "sec";
669 sata: ahci@fd0c0000 {
670 compatible = "ceva,ahci-1v84";
672 reg = <0x0 0xfd0c0000 0x2000>;
673 interrupt-parent = <&gic>;
674 interrupts = <0 133 4>;
675 power-domains = <&pd_sata>;
678 sdhci0: sdhci@ff160000 {
680 compatible = "arasan,sdhci-8.9a";
682 interrupt-parent = <&gic>;
683 interrupts = <0 48 4>;
684 reg = <0x0 0xff160000 0x1000>;
685 clock-names = "clk_xin", "clk_ahb";
687 power-domains = <&pd_sd0>;
690 sdhci1: sdhci@ff170000 {
692 compatible = "arasan,sdhci-8.9a";
694 interrupt-parent = <&gic>;
695 interrupts = <0 49 4>;
696 reg = <0x0 0xff170000 0x1000>;
697 clock-names = "clk_xin", "clk_ahb";
699 power-domains = <&pd_sd1>;
702 smmu: smmu@fd800000 {
703 compatible = "arm,mmu-500";
704 reg = <0x0 0xfd800000 0x20000>;
705 #global-interrupts = <1>;
706 interrupt-parent = <&gic>;
707 interrupts = <0 155 4>,
708 <0 155 4>, <0 155 4>, <0 155 4>, <0 155 4>,
709 <0 155 4>, <0 155 4>, <0 155 4>, <0 155 4>,
710 <0 155 4>, <0 155 4>, <0 155 4>, <0 155 4>,
711 <0 155 4>, <0 155 4>, <0 155 4>, <0 155 4>;
712 mmu-masters = < &gem0 0x874
719 compatible = "cdns,spi-r1p6";
721 interrupt-parent = <&gic>;
722 interrupts = <0 19 4>;
723 reg = <0x0 0xff040000 0x1000>;
724 clock-names = "ref_clk", "pclk";
725 #address-cells = <1>;
727 power-domains = <&pd_spi0>;
731 compatible = "cdns,spi-r1p6";
733 interrupt-parent = <&gic>;
734 interrupts = <0 20 4>;
735 reg = <0x0 0xff050000 0x1000>;
736 clock-names = "ref_clk", "pclk";
737 #address-cells = <1>;
739 power-domains = <&pd_spi1>;
742 ttc0: timer@ff110000 {
743 compatible = "cdns,ttc";
745 interrupt-parent = <&gic>;
746 interrupts = <0 36 4>, <0 37 4>, <0 38 4>;
747 reg = <0x0 0xff110000 0x1000>;
749 power-domains = <&pd_ttc0>;
752 ttc1: timer@ff120000 {
753 compatible = "cdns,ttc";
755 interrupt-parent = <&gic>;
756 interrupts = <0 39 4>, <0 40 4>, <0 41 4>;
757 reg = <0x0 0xff120000 0x1000>;
759 power-domains = <&pd_ttc1>;
762 ttc2: timer@ff130000 {
763 compatible = "cdns,ttc";
765 interrupt-parent = <&gic>;
766 interrupts = <0 42 4>, <0 43 4>, <0 44 4>;
767 reg = <0x0 0xff130000 0x1000>;
769 power-domains = <&pd_ttc2>;
772 ttc3: timer@ff140000 {
773 compatible = "cdns,ttc";
775 interrupt-parent = <&gic>;
776 interrupts = <0 45 4>, <0 46 4>, <0 47 4>;
777 reg = <0x0 0xff140000 0x1000>;
779 power-domains = <&pd_ttc3>;
782 uart0: serial@ff000000 {
784 compatible = "cdns,uart-r1p12", "xlnx,xuartps";
786 interrupt-parent = <&gic>;
787 interrupts = <0 21 4>;
788 reg = <0x0 0xff000000 0x1000>;
789 clock-names = "uart_clk", "pclk";
790 power-domains = <&pd_uart0>;
793 uart1: serial@ff010000 {
795 compatible = "cdns,uart-r1p12", "xlnx,xuartps";
797 interrupt-parent = <&gic>;
798 interrupts = <0 22 4>;
799 reg = <0x0 0xff010000 0x1000>;
800 clock-names = "uart_clk", "pclk";
801 power-domains = <&pd_uart1>;
805 #address-cells = <2>;
808 compatible = "xlnx,zynqmp-dwc3";
809 clock-names = "bus_clk", "ref_clk";
810 clocks = <&clk125>, <&clk125>;
811 power-domains = <&pd_usb0>;
814 dwc3_0: dwc3@fe200000 {
815 compatible = "snps,dwc3";
817 reg = <0x0 0xfe200000 0x40000>;
818 interrupt-parent = <&gic>;
819 interrupts = <0 65 4>;
820 /* snps,quirk-frame-length-adjustment = <0x20>; */
826 #address-cells = <2>;
829 compatible = "xlnx,zynqmp-dwc3";
830 clock-names = "bus_clk", "ref_clk";
831 clocks = <&clk125>, <&clk125>;
832 power-domains = <&pd_usb1>;
835 dwc3_1: dwc3@fe300000 {
836 compatible = "snps,dwc3";
838 reg = <0x0 0xfe300000 0x40000>;
839 interrupt-parent = <&gic>;
840 interrupts = <0 70 4>;
841 /* snps,quirk-frame-length-adjustment = <0x20>; */
846 watchdog0: watchdog@fd4d0000 {
847 compatible = "cdns,wdt-r1p2";
849 interrupt-parent = <&gic>;
850 interrupts = <0 113 1>;
851 reg = <0x0 0xfd4d0000 0x1000>;
855 xilinx_drm: xilinx_drm {
856 compatible = "xlnx,drm";
858 xlnx,encoder-slave = <&xlnx_dp>;
859 xlnx,connector-type = "DisplayPort";
860 xlnx,dp-sub = <&xlnx_dp_sub>;
862 xlnx,pixel-format = "rgb565";
864 dmas = <&xlnx_dpdma 3>;
868 dmas = <&xlnx_dpdma 0>;
874 xlnx_dp: dp@fd4a0000 {
875 compatible = "xlnx,v-dp";
877 reg = <0x0 0xfd4a0000 0x1000>,
878 <0x0 0xfd400000 0x20000>;
879 interrupts = <0 119 4>;
880 interrupt-parent = <&gic>;
881 clock-names = "aclk", "aud_clk";
882 xlnx,dp-version = "v1.2";
883 xlnx,max-lanes = <2>;
884 xlnx,max-link-rate = <540000>;
887 xlnx,colormetry = "rgb";
889 xlnx,audio-chan = <2>;
890 xlnx,dp-sub = <&xlnx_dp_sub>;
891 xlnx,max-pclock-frequency = <300000>;
894 xlnx_dp_snd_card: dp_snd_card {
895 compatible = "xlnx,dp-snd-card";
897 xlnx,dp-snd-pcm = <&xlnx_dp_snd_pcm0>, <&xlnx_dp_snd_pcm1>;
898 xlnx,dp-snd-codec = <&xlnx_dp_snd_codec0>;
901 xlnx_dp_snd_codec0: dp_snd_codec0 {
902 compatible = "xlnx,dp-snd-codec";
904 clock-names = "aud_clk";
907 xlnx_dp_snd_pcm0: dp_snd_pcm0 {
908 compatible = "xlnx,dp-snd-pcm";
910 dmas = <&xlnx_dpdma 4>;
914 xlnx_dp_snd_pcm1: dp_snd_pcm1 {
915 compatible = "xlnx,dp-snd-pcm";
917 dmas = <&xlnx_dpdma 5>;
921 xlnx_dp_sub: dp_sub@fd4aa000 {
922 compatible = "xlnx,dp-sub";
924 reg = <0x0 0xfd4aa000 0x1000>,
925 <0x0 0xfd4ab000 0x1000>,
926 <0x0 0xfd4ac000 0x1000>;
927 reg-names = "blend", "av_buf", "aud";
928 xlnx,output-fmt = "rgb";
929 xlnx,vid-fmt = "yuyv";
930 xlnx,gfx-fmt = "rgb565";
933 xlnx_dpdma: dma@fd4c0000 {
934 compatible = "xlnx,dpdma";
936 reg = <0x0 0xfd4c0000 0x1000>;
937 interrupts = <0 122 4>;
938 interrupt-parent = <&gic>;
939 clock-names = "axi_clk";
943 compatible = "xlnx,video0";
946 compatible = "xlnx,video1";
949 compatible = "xlnx,video2";
951 dma-graphicschannel {
952 compatible = "xlnx,graphics";
955 compatible = "xlnx,audio0";
958 compatible = "xlnx,audio1";