2 * dts file for Xilinx ZynqMP
4 * (C) Copyright 2014 - 2015, Xilinx, Inc.
6 * Michal Simek <michal.simek@xilinx.com>
8 * SPDX-License-Identifier: GPL-2.0+
11 compatible = "xlnx,zynqmp";
20 compatible = "arm,cortex-a53", "arm,armv8";
22 enable-method = "psci";
27 compatible = "arm,cortex-a53", "arm,armv8";
29 enable-method = "psci";
34 compatible = "arm,cortex-a53", "arm,armv8";
36 enable-method = "psci";
41 compatible = "arm,cortex-a53", "arm,armv8";
43 enable-method = "psci";
49 compatible = "xlnx,zynqmp-genpd";
52 #power-domain-cells = <0x0>;
57 #power-domain-cells = <0x0>;
62 #power-domain-cells = <0x0>;
67 #power-domain-cells = <0x0>;
72 #power-domain-cells = <0x0>;
77 #power-domain-cells = <0x0>;
82 #power-domain-cells = <0x0>;
87 #power-domain-cells = <0x0>;
92 #power-domain-cells = <0x0>;
97 #power-domain-cells = <0x0>;
102 #power-domain-cells = <0x0>;
107 #power-domain-cells = <0x0>;
112 #power-domain-cells = <0x0>;
117 /* fixme: what to attach to */
118 #power-domain-cells = <0x0>;
123 #power-domain-cells = <0x0>;
128 #power-domain-cells = <0x0>;
133 #power-domain-cells = <0x0>;
138 #power-domain-cells = <0x0>;
143 #power-domain-cells = <0x0>;
148 #power-domain-cells = <0x0>;
153 #power-domain-cells = <0x0>;
158 #power-domain-cells = <0x0>;
163 #power-domain-cells = <0x0>;
168 #power-domain-cells = <0x0>;
173 #power-domain-cells = <0x0>;
178 #power-domain-cells = <0x0>;
183 #power-domain-cells = <0x0>;
188 #power-domain-cells = <0x0>;
193 #power-domain-cells = <0x0>;
198 #power-domain-cells = <0x0>;
203 #power-domain-cells = <0x0>;
208 #power-domain-cells = <0x0>;
213 #power-domain-cells = <0x0>;
219 compatible = "arm,armv8-pmuv3";
220 interrupt-parent = <&gic>;
221 interrupts = <0 143 4>,
228 compatible = "arm,psci-0.2";
233 compatible = "xlnx,zynqmp-pm";
238 compatible = "arm,armv8-timer";
239 interrupt-parent = <&gic>;
240 interrupts = <1 13 0xf01>,
247 compatible = "simple-bus";
248 #address-cells = <2>;
252 gic: interrupt-controller@f9010000 {
253 compatible = "arm,gic-400", "arm,cortex-a15-gic";
254 #interrupt-cells = <3>;
255 reg = <0x0 0xf9010000 0x10000>,
256 <0x0 0xf902f000 0x2000>,
257 <0x0 0xf9040000 0x20000>,
258 <0x0 0xf906f000 0x2000>;
259 interrupt-controller;
260 interrupt-parent = <&gic>;
261 interrupts = <1 9 0xf04>;
266 compatible = "simple-bus";
267 #address-cells = <2>;
272 compatible = "xlnx,zynq-can-1.0";
274 clock-names = "can_clk", "pclk";
275 reg = <0x0 0xff060000 0x1000>;
276 interrupts = <0 23 4>;
277 interrupt-parent = <&gic>;
278 tx-fifo-depth = <0x40>;
279 rx-fifo-depth = <0x40>;
280 power-domains = <&pd_can0>;
284 compatible = "xlnx,zynq-can-1.0";
286 clock-names = "can_clk", "pclk";
287 reg = <0x0 0xff070000 0x1000>;
288 interrupts = <0 24 4>;
289 interrupt-parent = <&gic>;
290 tx-fifo-depth = <0x40>;
291 rx-fifo-depth = <0x40>;
292 power-domains = <&pd_can1>;
296 compatible = "arm,cci-400";
297 reg = <0x0 0xfd6e0000 0x9000>;
298 ranges = <0x0 0x0 0xfd6e0000 0x10000>;
299 #address-cells = <1>;
303 compatible = "arm,cci-400-pmu,r1";
304 reg = <0x9000 0x5000>;
305 interrupt-parent = <&gic>;
306 interrupts = <0 123 4>,
315 fpd_dma_chan1: dma@fd500000 {
317 compatible = "xlnx,zynqmp-dma-1.0";
318 reg = <0x0 0xfd500000 0x1000>;
319 interrupt-parent = <&gic>;
320 interrupts = <0 124 4>;
321 clock-names = "clk_main", "clk_apb";
323 xlnx,bus-width = <128>;
324 power-domains = <&pd_gdma>;
327 fpd_dma_chan2: dma@fd510000 {
329 compatible = "xlnx,zynqmp-dma-1.0";
330 reg = <0x0 0xfd510000 0x1000>;
331 interrupt-parent = <&gic>;
332 interrupts = <0 125 4>;
333 clock-names = "clk_main", "clk_apb";
335 xlnx,bus-width = <128>;
336 power-domains = <&pd_gdma>;
339 fpd_dma_chan3: dma@fd520000 {
341 compatible = "xlnx,zynqmp-dma-1.0";
342 reg = <0x0 0xfd520000 0x1000>;
343 interrupt-parent = <&gic>;
344 interrupts = <0 126 4>;
345 clock-names = "clk_main", "clk_apb";
347 xlnx,bus-width = <128>;
348 power-domains = <&pd_gdma>;
351 fpd_dma_chan4: dma@fd530000 {
353 compatible = "xlnx,zynqmp-dma-1.0";
354 reg = <0x0 0xfd530000 0x1000>;
355 interrupt-parent = <&gic>;
356 interrupts = <0 127 4>;
357 clock-names = "clk_main", "clk_apb";
359 xlnx,bus-width = <128>;
360 power-domains = <&pd_gdma>;
363 fpd_dma_chan5: dma@fd540000 {
365 compatible = "xlnx,zynqmp-dma-1.0";
366 reg = <0x0 0xfd540000 0x1000>;
367 interrupt-parent = <&gic>;
368 interrupts = <0 128 4>;
369 clock-names = "clk_main", "clk_apb";
371 xlnx,bus-width = <128>;
372 power-domains = <&pd_gdma>;
375 fpd_dma_chan6: dma@fd550000 {
377 compatible = "xlnx,zynqmp-dma-1.0";
378 reg = <0x0 0xfd550000 0x1000>;
379 interrupt-parent = <&gic>;
380 interrupts = <0 129 4>;
381 clock-names = "clk_main", "clk_apb";
383 xlnx,bus-width = <128>;
384 power-domains = <&pd_gdma>;
387 fpd_dma_chan7: dma@fd560000 {
389 compatible = "xlnx,zynqmp-dma-1.0";
390 reg = <0x0 0xfd560000 0x1000>;
391 interrupt-parent = <&gic>;
392 interrupts = <0 130 4>;
393 clock-names = "clk_main", "clk_apb";
395 xlnx,bus-width = <128>;
396 power-domains = <&pd_gdma>;
399 fpd_dma_chan8: dma@fd570000 {
401 compatible = "xlnx,zynqmp-dma-1.0";
402 reg = <0x0 0xfd570000 0x1000>;
403 interrupt-parent = <&gic>;
404 interrupts = <0 131 4>;
405 clock-names = "clk_main", "clk_apb";
407 xlnx,bus-width = <128>;
408 power-domains = <&pd_gdma>;
413 compatible = "arm,mali-400", "arm,mali-utgard";
414 reg = <0x0 0xfd4b0000 0x30000>;
415 interrupt-parent = <&gic>;
416 interrupts = <0 132 4>, <0 132 4>, <0 132 4>, <0 132 4>, <0 132 4>, <0 132 4>;
417 interrupt-names = "IRQGP", "IRQGPMMU", "IRQPP0", "IRQPPMMU0", "IRQPP1", "IRQPPMMU1";
421 lpd_dma_chan1: dma@ffa80000 {
423 compatible = "xlnx,zynqmp-dma-1.0";
424 reg = <0x0 0xffa80000 0x1000>;
425 interrupt-parent = <&gic>;
426 interrupts = <0 77 4>;
428 xlnx,bus-width = <64>;
429 power-domains = <&pd_adma>;
432 lpd_dma_chan2: dma@ffa90000 {
434 compatible = "xlnx,zynqmp-dma-1.0";
435 reg = <0x0 0xffa90000 0x1000>;
436 interrupt-parent = <&gic>;
437 interrupts = <0 78 4>;
439 xlnx,bus-width = <64>;
440 power-domains = <&pd_adma>;
443 lpd_dma_chan3: dma@ffaa0000 {
445 compatible = "xlnx,zynqmp-dma-1.0";
446 reg = <0x0 0xffaa0000 0x1000>;
447 interrupt-parent = <&gic>;
448 interrupts = <0 79 4>;
450 xlnx,bus-width = <64>;
451 power-domains = <&pd_adma>;
454 lpd_dma_chan4: dma@ffab0000 {
456 compatible = "xlnx,zynqmp-dma-1.0";
457 reg = <0x0 0xffab0000 0x1000>;
458 interrupt-parent = <&gic>;
459 interrupts = <0 80 4>;
461 xlnx,bus-width = <64>;
462 power-domains = <&pd_adma>;
465 lpd_dma_chan5: dma@ffac0000 {
467 compatible = "xlnx,zynqmp-dma-1.0";
468 reg = <0x0 0xffac0000 0x1000>;
469 interrupt-parent = <&gic>;
470 interrupts = <0 81 4>;
472 xlnx,bus-width = <64>;
473 power-domains = <&pd_adma>;
476 lpd_dma_chan6: dma@ffad0000 {
478 compatible = "xlnx,zynqmp-dma-1.0";
479 reg = <0x0 0xffad0000 0x1000>;
480 interrupt-parent = <&gic>;
481 interrupts = <0 82 4>;
483 xlnx,bus-width = <64>;
484 power-domains = <&pd_adma>;
487 lpd_dma_chan7: dma@ffae0000 {
489 compatible = "xlnx,zynqmp-dma-1.0";
490 reg = <0x0 0xffae0000 0x1000>;
491 interrupt-parent = <&gic>;
492 interrupts = <0 83 4>;
494 xlnx,bus-width = <64>;
495 power-domains = <&pd_adma>;
498 lpd_dma_chan8: dma@ffaf0000 {
500 compatible = "xlnx,zynqmp-dma-1.0";
501 reg = <0x0 0xffaf0000 0x1000>;
502 interrupt-parent = <&gic>;
503 interrupts = <0 84 4>;
505 xlnx,bus-width = <64>;
506 power-domains = <&pd_adma>;
509 mc: memory-controller@fd070000 {
510 compatible = "xlnx,zynqmp-ddrc-2.40a";
511 reg = <0x0 0xfd070000 0x30000>;
512 interrupt-parent = <&gic>;
513 interrupts = <0 112 4>;
516 nand0: nand@ff100000 {
517 compatible = "arasan,nfc-v3p10";
519 reg = <0x0 0xff100000 0x1000>;
520 clock-names = "clk_sys", "clk_flash";
521 interrupt-parent = <&gic>;
522 interrupts = <0 14 4>;
523 #address-cells = <2>;
525 power-domains = <&pd_nand>;
528 gem0: ethernet@ff0b0000 {
529 compatible = "cdns,zynqmp-gem";
531 interrupt-parent = <&gic>;
532 interrupts = <0 57 4>, <0 57 4>;
533 reg = <0x0 0xff0b0000 0x1000>;
534 clock-names = "pclk", "hclk", "tx_clk";
535 #address-cells = <1>;
537 #stream-id-cells = <1>;
538 power-domains = <&pd_eth0>;
541 gem1: ethernet@ff0c0000 {
542 compatible = "cdns,zynqmp-gem";
544 interrupt-parent = <&gic>;
545 interrupts = <0 59 4>, <0 59 4>;
546 reg = <0x0 0xff0c0000 0x1000>;
547 clock-names = "pclk", "hclk", "tx_clk";
548 #address-cells = <1>;
550 #stream-id-cells = <1>;
551 power-domains = <&pd_eth1>;
554 gem2: ethernet@ff0d0000 {
555 compatible = "cdns,zynqmp-gem";
557 interrupt-parent = <&gic>;
558 interrupts = <0 61 4>, <0 61 4>;
559 reg = <0x0 0xff0d0000 0x1000>;
560 clock-names = "pclk", "hclk", "tx_clk";
561 #address-cells = <1>;
563 #stream-id-cells = <1>;
564 power-domains = <&pd_eth2>;
567 gem3: ethernet@ff0e0000 {
568 compatible = "cdns,zynqmp-gem";
570 interrupt-parent = <&gic>;
571 interrupts = <0 63 4>, <0 63 4>;
572 reg = <0x0 0xff0e0000 0x1000>;
573 clock-names = "pclk", "hclk", "tx_clk";
574 #address-cells = <1>;
576 #stream-id-cells = <1>;
577 power-domains = <&pd_eth3>;
580 gpio: gpio@ff0a0000 {
581 compatible = "xlnx,zynqmp-gpio-1.0";
584 interrupt-parent = <&gic>;
585 interrupts = <0 16 4>;
586 reg = <0x0 0xff0a0000 0x1000>;
587 power-domains = <&pd_gpio>;
591 compatible = "cdns,i2c-r1p10";
593 interrupt-parent = <&gic>;
594 interrupts = <0 17 4>;
595 reg = <0x0 0xff020000 0x1000>;
596 #address-cells = <1>;
598 power-domains = <&pd_i2c0>;
602 compatible = "cdns,i2c-r1p10";
604 interrupt-parent = <&gic>;
605 interrupts = <0 18 4>;
606 reg = <0x0 0xff030000 0x1000>;
607 #address-cells = <1>;
609 power-domains = <&pd_i2c1>;
612 pcie: pcie@fd0e0000 {
613 compatible = "xlnx,nwl-pcie-2.11";
615 #address-cells = <3>;
617 #interrupt-cells = <1>;
619 interrupt-parent = <&gic>;
620 interrupts = < 0 118 4>,
622 < 0 115 4>, /* MSI_1 [63...32] */
623 < 0 114 4 >; /* MSI_0 [31...0] */
624 interrupt-names = "misc", "intx", "msi_1", "msi_0";
625 reg = <0x0 0xfd0e0000 0x1000>,
626 <0x0 0xfd480000 0x1000>,
627 <0x0 0xe0000000 0x1000000>;
628 reg-names = "breg", "pcireg", "cfg";
629 ranges = <0x02000000 0x00000000 0xe1000000 0x00000000 0xe1000000 0 0x0f000000>;
633 compatible = "xlnx,zynqmp-qspi-1.0";
635 clock-names = "ref_clk", "pclk";
636 interrupts = <0 15 4>;
637 interrupt-parent = <&gic>;
639 reg = <0x0 0xff0f0000 0x1000 0x0 0xc0000000 0x8000000>;
640 #address-cells = <1>;
642 power-domains = <&pd_qspi>;
646 compatible = "xlnx,zynqmp-rtc";
648 reg = <0x0 0xffa60000 0x100>;
649 interrupt-parent = <&gic>;
650 interrupts = <0 26 4>, <0 27 4>;
651 interrupt-names = "alarm", "sec";
654 sata: ahci@fd0c0000 {
655 compatible = "ceva,ahci-1v84";
657 reg = <0x0 0xfd0c0000 0x2000>;
658 interrupt-parent = <&gic>;
659 interrupts = <0 133 4>;
660 power-domains = <&pd_sata>;
663 sdhci0: sdhci@ff160000 {
664 compatible = "arasan,sdhci-8.9a";
666 interrupt-parent = <&gic>;
667 interrupts = <0 48 4>;
668 reg = <0x0 0xff160000 0x1000>;
669 clock-names = "clk_xin", "clk_ahb";
671 power-domains = <&pd_sd0>;
674 sdhci1: sdhci@ff170000 {
675 compatible = "arasan,sdhci-8.9a";
677 interrupt-parent = <&gic>;
678 interrupts = <0 49 4>;
679 reg = <0x0 0xff170000 0x1000>;
680 clock-names = "clk_xin", "clk_ahb";
682 power-domains = <&pd_sd1>;
685 smmu: smmu@fd800000 {
686 compatible = "arm,mmu-500";
687 reg = <0x0 0xfd800000 0x20000>;
688 #global-interrupts = <1>;
689 interrupt-parent = <&gic>;
690 interrupts = <0 155 4>,
691 <0 155 4>, <0 155 4>, <0 155 4>, <0 155 4>,
692 <0 155 4>, <0 155 4>, <0 155 4>, <0 155 4>,
693 <0 155 4>, <0 155 4>, <0 155 4>, <0 155 4>,
694 <0 155 4>, <0 155 4>, <0 155 4>, <0 155 4>;
695 mmu-masters = < &gem0 0x874
702 compatible = "cdns,spi-r1p6";
704 interrupt-parent = <&gic>;
705 interrupts = <0 19 4>;
706 reg = <0x0 0xff040000 0x1000>;
707 clock-names = "ref_clk", "pclk";
708 #address-cells = <1>;
710 power-domains = <&pd_spi0>;
714 compatible = "cdns,spi-r1p6";
716 interrupt-parent = <&gic>;
717 interrupts = <0 20 4>;
718 reg = <0x0 0xff050000 0x1000>;
719 clock-names = "ref_clk", "pclk";
720 #address-cells = <1>;
722 power-domains = <&pd_spi1>;
725 ttc0: timer@ff110000 {
726 compatible = "cdns,ttc";
728 interrupt-parent = <&gic>;
729 interrupts = <0 36 4>, <0 37 4>, <0 38 4>;
730 reg = <0x0 0xff110000 0x1000>;
732 power-domains = <&pd_ttc0>;
735 ttc1: timer@ff120000 {
736 compatible = "cdns,ttc";
738 interrupt-parent = <&gic>;
739 interrupts = <0 39 4>, <0 40 4>, <0 41 4>;
740 reg = <0x0 0xff120000 0x1000>;
742 power-domains = <&pd_ttc1>;
745 ttc2: timer@ff130000 {
746 compatible = "cdns,ttc";
748 interrupt-parent = <&gic>;
749 interrupts = <0 42 4>, <0 43 4>, <0 44 4>;
750 reg = <0x0 0xff130000 0x1000>;
752 power-domains = <&pd_ttc2>;
755 ttc3: timer@ff140000 {
756 compatible = "cdns,ttc";
758 interrupt-parent = <&gic>;
759 interrupts = <0 45 4>, <0 46 4>, <0 47 4>;
760 reg = <0x0 0xff140000 0x1000>;
762 power-domains = <&pd_ttc3>;
765 uart0: serial@ff000000 {
766 compatible = "cdns,uart-r1p12";
768 interrupt-parent = <&gic>;
769 interrupts = <0 21 4>;
770 reg = <0x0 0xff000000 0x1000>;
771 clock-names = "uart_clk", "pclk";
772 power-domains = <&pd_uart0>;
775 uart1: serial@ff010000 {
776 compatible = "cdns,uart-r1p12";
778 interrupt-parent = <&gic>;
779 interrupts = <0 22 4>;
780 reg = <0x0 0xff010000 0x1000>;
781 clock-names = "uart_clk", "pclk";
782 power-domains = <&pd_uart1>;
786 compatible = "snps,dwc3";
788 interrupt-parent = <&gic>;
789 interrupts = <0 65 4>;
790 reg = <0x0 0xfe200000 0x40000>;
791 clock-names = "clk_xin", "clk_ahb";
792 power-domains = <&pd_usb0>;
796 compatible = "snps,dwc3";
798 interrupt-parent = <&gic>;
799 interrupts = <0 70 4>;
800 reg = <0x0 0xfe300000 0x40000>;
801 clock-names = "clk_xin", "clk_ahb";
802 power-domains = <&pd_usb1>;
805 watchdog0: watchdog@fd4d0000 {
806 compatible = "cdns,wdt-r1p2";
808 interrupt-parent = <&gic>;
809 interrupts = <0 113 1>;
810 reg = <0x0 0xfd4d0000 0x1000>;
814 xilinx_drm: xilinx_drm {
815 compatible = "xlnx,drm";
817 xlnx,encoder-slave = <&xlnx_dp>;
818 xlnx,connector-type = "DisplayPort";
819 xlnx,dp-sub = <&xlnx_dp_sub>;
821 xlnx,pixel-format = "rgb565";
823 dmas = <&xlnx_dpdma 3>;
827 dmas = <&xlnx_dpdma 0>;
833 xlnx_dp: dp@43c00000 {
834 compatible = "xlnx,v-dp";
836 reg = <0x0 0xfd4a0000 0x1000>;
837 interrupts = <0 119 4>;
838 interrupt-parent = <&gic>;
839 clock-names = "aclk", "aud_clk";
840 xlnx,dp-version = "v1.2";
841 xlnx,max-lanes = <2>;
842 xlnx,max-link-rate = <540000>;
845 xlnx,colormetry = "rgb";
847 xlnx,audio-chan = <2>;
848 xlnx,dp-sub = <&xlnx_dp_sub>;
851 xlnx_dp_snd_card: dp_snd_card {
852 compatible = "xlnx,dp-snd-card";
854 xlnx,dp-snd-pcm = <&xlnx_dp_snd_pcm0>, <&xlnx_dp_snd_pcm1>;
855 xlnx,dp-snd-codec = <&xlnx_dp_snd_codec0>;
858 xlnx_dp_snd_codec0: dp_snd_codec0 {
859 compatible = "xlnx,dp-snd-codec";
861 clock-names = "aud_clk";
864 xlnx_dp_snd_pcm0: dp_snd_pcm0 {
865 compatible = "xlnx,dp-snd-pcm";
867 dmas = <&xlnx_dpdma 4>;
871 xlnx_dp_snd_pcm1: dp_snd_pcm1 {
872 compatible = "xlnx,dp-snd-pcm";
874 dmas = <&xlnx_dpdma 5>;
878 xlnx_dp_sub: dp_sub@43c0a000 {
879 compatible = "xlnx,dp-sub";
881 reg = <0x0 0xfd4aa000 0x1000>, <0x0 0xfd4ab000 0x1000>, <0x0 0xfd4ac000 0x1000>;
882 reg-names = "blend", "av_buf", "aud";
883 xlnx,output-fmt = "rgb";
886 xlnx_dpdma: dma@fd4c0000 {
887 compatible = "xlnx,dpdma";
889 reg = <0x0 0xfd4c0000 0x1000>;
890 interrupts = <0 122 4>;
891 interrupt-parent = <&gic>;
892 clock-names = "axi_clk";
895 dma-video0channel@43c10000 {
896 compatible = "xlnx,video0";
898 dma-video1channel@43c10000 {
899 compatible = "xlnx,video1";
901 dma-video2channel@43c10000 {
902 compatible = "xlnx,video2";
904 dma-graphicschannel@43c10000 {
905 compatible = "xlnx,graphics";
907 dma-audio0channel@43c10000 {
908 compatible = "xlnx,audio0";
910 dma-audio1channel@43c10000 {
911 compatible = "xlnx,audio1";