2 * dts file for Xilinx ZynqMP
4 * (C) Copyright 2014 - 2015, Xilinx, Inc.
6 * Michal Simek <michal.simek@xilinx.com>
8 * SPDX-License-Identifier: GPL-2.0+
11 compatible = "xlnx,zynqmp";
20 compatible = "arm,cortex-a53", "arm,armv8";
22 enable-method = "psci";
27 compatible = "arm,cortex-a53", "arm,armv8";
29 enable-method = "psci";
34 compatible = "arm,cortex-a53", "arm,armv8";
36 enable-method = "psci";
41 compatible = "arm,cortex-a53", "arm,armv8";
43 enable-method = "psci";
49 compatible = "arm,dcc";
55 compatible = "xlnx,zynqmp-genpd";
58 #power-domain-cells = <0x0>;
63 #power-domain-cells = <0x0>;
68 #power-domain-cells = <0x0>;
73 #power-domain-cells = <0x0>;
78 #power-domain-cells = <0x0>;
83 #power-domain-cells = <0x0>;
88 #power-domain-cells = <0x0>;
93 #power-domain-cells = <0x0>;
98 #power-domain-cells = <0x0>;
103 #power-domain-cells = <0x0>;
108 #power-domain-cells = <0x0>;
113 #power-domain-cells = <0x0>;
118 #power-domain-cells = <0x0>;
123 /* fixme: what to attach to */
124 #power-domain-cells = <0x0>;
129 #power-domain-cells = <0x0>;
134 #power-domain-cells = <0x0>;
139 #power-domain-cells = <0x0>;
144 #power-domain-cells = <0x0>;
149 #power-domain-cells = <0x0>;
154 #power-domain-cells = <0x0>;
159 #power-domain-cells = <0x0>;
164 #power-domain-cells = <0x0>;
169 #power-domain-cells = <0x0>;
174 #power-domain-cells = <0x0>;
179 #power-domain-cells = <0x0>;
184 #power-domain-cells = <0x0>;
189 #power-domain-cells = <0x0>;
194 #power-domain-cells = <0x0>;
199 #power-domain-cells = <0x0>;
200 pd-id = <0x3a 0x14 0x15>;
205 compatible = "arm,armv8-pmuv3";
206 interrupt-parent = <&gic>;
207 interrupts = <0 143 4>,
214 compatible = "arm,psci-0.2";
219 compatible = "xlnx,zynqmp-pm";
224 compatible = "arm,armv8-timer";
225 interrupt-parent = <&gic>;
226 interrupts = <1 13 0xf01>,
232 amba_apu: amba_apu@0 {
233 compatible = "simple-bus";
234 #address-cells = <2>;
236 ranges = <0 0 0 0 0xffffffff>;
238 gic: interrupt-controller@f9010000 {
239 compatible = "arm,gic-400", "arm,cortex-a15-gic";
240 #interrupt-cells = <3>;
241 reg = <0x0 0xf9010000 0x10000>,
242 <0x0 0xf9020000 0x20000>,
243 <0x0 0xf9040000 0x20000>,
244 <0x0 0xf9060000 0x20000>;
245 interrupt-controller;
246 interrupt-parent = <&gic>;
247 interrupts = <1 9 0xf04>;
252 compatible = "simple-bus";
254 #address-cells = <2>;
256 ranges = <0 0 0 0 0xffffffff>;
259 compatible = "xlnx,zynq-can-1.0";
261 clock-names = "can_clk", "pclk";
262 reg = <0x0 0xff060000 0x1000>;
263 interrupts = <0 23 4>;
264 interrupt-parent = <&gic>;
265 tx-fifo-depth = <0x40>;
266 rx-fifo-depth = <0x40>;
267 power-domains = <&pd_can0>;
271 compatible = "xlnx,zynq-can-1.0";
273 clock-names = "can_clk", "pclk";
274 reg = <0x0 0xff070000 0x1000>;
275 interrupts = <0 24 4>;
276 interrupt-parent = <&gic>;
277 tx-fifo-depth = <0x40>;
278 rx-fifo-depth = <0x40>;
279 power-domains = <&pd_can1>;
283 compatible = "arm,cci-400";
284 reg = <0x0 0xfd6e0000 0x9000>;
285 ranges = <0x0 0x0 0xfd6e0000 0x10000>;
286 #address-cells = <1>;
290 compatible = "arm,cci-400-pmu,r1";
291 reg = <0x9000 0x5000>;
292 interrupt-parent = <&gic>;
293 interrupts = <0 123 4>,
302 fpd_dma_chan1: dma@fd500000 {
304 compatible = "xlnx,zynqmp-dma-1.0";
305 reg = <0x0 0xfd500000 0x1000>;
306 interrupt-parent = <&gic>;
307 interrupts = <0 124 4>;
308 clock-names = "clk_main", "clk_apb";
310 xlnx,bus-width = <128>;
311 power-domains = <&pd_gdma>;
314 fpd_dma_chan2: dma@fd510000 {
316 compatible = "xlnx,zynqmp-dma-1.0";
317 reg = <0x0 0xfd510000 0x1000>;
318 interrupt-parent = <&gic>;
319 interrupts = <0 125 4>;
320 clock-names = "clk_main", "clk_apb";
322 xlnx,bus-width = <128>;
323 power-domains = <&pd_gdma>;
326 fpd_dma_chan3: dma@fd520000 {
328 compatible = "xlnx,zynqmp-dma-1.0";
329 reg = <0x0 0xfd520000 0x1000>;
330 interrupt-parent = <&gic>;
331 interrupts = <0 126 4>;
332 clock-names = "clk_main", "clk_apb";
334 xlnx,bus-width = <128>;
335 power-domains = <&pd_gdma>;
338 fpd_dma_chan4: dma@fd530000 {
340 compatible = "xlnx,zynqmp-dma-1.0";
341 reg = <0x0 0xfd530000 0x1000>;
342 interrupt-parent = <&gic>;
343 interrupts = <0 127 4>;
344 clock-names = "clk_main", "clk_apb";
346 xlnx,bus-width = <128>;
347 power-domains = <&pd_gdma>;
350 fpd_dma_chan5: dma@fd540000 {
352 compatible = "xlnx,zynqmp-dma-1.0";
353 reg = <0x0 0xfd540000 0x1000>;
354 interrupt-parent = <&gic>;
355 interrupts = <0 128 4>;
356 clock-names = "clk_main", "clk_apb";
358 xlnx,bus-width = <128>;
359 power-domains = <&pd_gdma>;
362 fpd_dma_chan6: dma@fd550000 {
364 compatible = "xlnx,zynqmp-dma-1.0";
365 reg = <0x0 0xfd550000 0x1000>;
366 interrupt-parent = <&gic>;
367 interrupts = <0 129 4>;
368 clock-names = "clk_main", "clk_apb";
370 xlnx,bus-width = <128>;
371 power-domains = <&pd_gdma>;
374 fpd_dma_chan7: dma@fd560000 {
376 compatible = "xlnx,zynqmp-dma-1.0";
377 reg = <0x0 0xfd560000 0x1000>;
378 interrupt-parent = <&gic>;
379 interrupts = <0 130 4>;
380 clock-names = "clk_main", "clk_apb";
382 xlnx,bus-width = <128>;
383 power-domains = <&pd_gdma>;
386 fpd_dma_chan8: dma@fd570000 {
388 compatible = "xlnx,zynqmp-dma-1.0";
389 reg = <0x0 0xfd570000 0x1000>;
390 interrupt-parent = <&gic>;
391 interrupts = <0 131 4>;
392 clock-names = "clk_main", "clk_apb";
394 xlnx,bus-width = <128>;
395 power-domains = <&pd_gdma>;
400 compatible = "arm,mali-400", "arm,mali-utgard";
401 reg = <0x0 0xfd4b0000 0x30000>;
402 interrupt-parent = <&gic>;
403 interrupts = <0 132 4>, <0 132 4>, <0 132 4>, <0 132 4>, <0 132 4>, <0 132 4>;
404 interrupt-names = "IRQGP", "IRQGPMMU", "IRQPP0", "IRQPPMMU0", "IRQPP1", "IRQPPMMU1";
405 power-domains = <&pd_gpu>;
409 lpd_dma_chan1: dma@ffa80000 {
411 compatible = "xlnx,zynqmp-dma-1.0";
412 reg = <0x0 0xffa80000 0x1000>;
413 interrupt-parent = <&gic>;
414 interrupts = <0 77 4>;
416 xlnx,bus-width = <64>;
417 power-domains = <&pd_adma>;
420 lpd_dma_chan2: dma@ffa90000 {
422 compatible = "xlnx,zynqmp-dma-1.0";
423 reg = <0x0 0xffa90000 0x1000>;
424 interrupt-parent = <&gic>;
425 interrupts = <0 78 4>;
427 xlnx,bus-width = <64>;
428 power-domains = <&pd_adma>;
431 lpd_dma_chan3: dma@ffaa0000 {
433 compatible = "xlnx,zynqmp-dma-1.0";
434 reg = <0x0 0xffaa0000 0x1000>;
435 interrupt-parent = <&gic>;
436 interrupts = <0 79 4>;
438 xlnx,bus-width = <64>;
439 power-domains = <&pd_adma>;
442 lpd_dma_chan4: dma@ffab0000 {
444 compatible = "xlnx,zynqmp-dma-1.0";
445 reg = <0x0 0xffab0000 0x1000>;
446 interrupt-parent = <&gic>;
447 interrupts = <0 80 4>;
449 xlnx,bus-width = <64>;
450 power-domains = <&pd_adma>;
453 lpd_dma_chan5: dma@ffac0000 {
455 compatible = "xlnx,zynqmp-dma-1.0";
456 reg = <0x0 0xffac0000 0x1000>;
457 interrupt-parent = <&gic>;
458 interrupts = <0 81 4>;
460 xlnx,bus-width = <64>;
461 power-domains = <&pd_adma>;
464 lpd_dma_chan6: dma@ffad0000 {
466 compatible = "xlnx,zynqmp-dma-1.0";
467 reg = <0x0 0xffad0000 0x1000>;
468 interrupt-parent = <&gic>;
469 interrupts = <0 82 4>;
471 xlnx,bus-width = <64>;
472 power-domains = <&pd_adma>;
475 lpd_dma_chan7: dma@ffae0000 {
477 compatible = "xlnx,zynqmp-dma-1.0";
478 reg = <0x0 0xffae0000 0x1000>;
479 interrupt-parent = <&gic>;
480 interrupts = <0 83 4>;
482 xlnx,bus-width = <64>;
483 power-domains = <&pd_adma>;
486 lpd_dma_chan8: dma@ffaf0000 {
488 compatible = "xlnx,zynqmp-dma-1.0";
489 reg = <0x0 0xffaf0000 0x1000>;
490 interrupt-parent = <&gic>;
491 interrupts = <0 84 4>;
493 xlnx,bus-width = <64>;
494 power-domains = <&pd_adma>;
497 mc: memory-controller@fd070000 {
498 compatible = "xlnx,zynqmp-ddrc-2.40a";
499 reg = <0x0 0xfd070000 0x30000>;
500 interrupt-parent = <&gic>;
501 interrupts = <0 112 4>;
504 nand0: nand@ff100000 {
505 compatible = "arasan,nfc-v3p10";
507 reg = <0x0 0xff100000 0x1000>;
508 clock-names = "clk_sys", "clk_flash";
509 interrupt-parent = <&gic>;
510 interrupts = <0 14 4>;
511 #address-cells = <2>;
513 power-domains = <&pd_nand>;
516 gem0: ethernet@ff0b0000 {
517 compatible = "cdns,zynqmp-gem";
519 interrupt-parent = <&gic>;
520 interrupts = <0 57 4>, <0 57 4>;
521 reg = <0x0 0xff0b0000 0x1000>;
522 clock-names = "pclk", "hclk", "tx_clk";
523 #address-cells = <1>;
525 #stream-id-cells = <1>;
526 power-domains = <&pd_eth0>;
529 gem1: ethernet@ff0c0000 {
530 compatible = "cdns,zynqmp-gem";
532 interrupt-parent = <&gic>;
533 interrupts = <0 59 4>, <0 59 4>;
534 reg = <0x0 0xff0c0000 0x1000>;
535 clock-names = "pclk", "hclk", "tx_clk";
536 #address-cells = <1>;
538 #stream-id-cells = <1>;
539 power-domains = <&pd_eth1>;
542 gem2: ethernet@ff0d0000 {
543 compatible = "cdns,zynqmp-gem";
545 interrupt-parent = <&gic>;
546 interrupts = <0 61 4>, <0 61 4>;
547 reg = <0x0 0xff0d0000 0x1000>;
548 clock-names = "pclk", "hclk", "tx_clk";
549 #address-cells = <1>;
551 #stream-id-cells = <1>;
552 power-domains = <&pd_eth2>;
555 gem3: ethernet@ff0e0000 {
556 compatible = "cdns,zynqmp-gem";
558 interrupt-parent = <&gic>;
559 interrupts = <0 63 4>, <0 63 4>;
560 reg = <0x0 0xff0e0000 0x1000>;
561 clock-names = "pclk", "hclk", "tx_clk";
562 #address-cells = <1>;
564 #stream-id-cells = <1>;
565 power-domains = <&pd_eth3>;
568 gpio: gpio@ff0a0000 {
569 compatible = "xlnx,zynqmp-gpio-1.0";
572 #interrupt-cells = <2>;
573 interrupt-controller;
574 interrupt-parent = <&gic>;
575 interrupts = <0 16 4>;
576 reg = <0x0 0xff0a0000 0x1000>;
577 power-domains = <&pd_gpio>;
581 compatible = "cdns,i2c-r1p10";
583 interrupt-parent = <&gic>;
584 interrupts = <0 17 4>;
585 reg = <0x0 0xff020000 0x1000>;
586 #address-cells = <1>;
588 power-domains = <&pd_i2c0>;
592 compatible = "cdns,i2c-r1p10";
594 interrupt-parent = <&gic>;
595 interrupts = <0 18 4>;
596 reg = <0x0 0xff030000 0x1000>;
597 #address-cells = <1>;
599 power-domains = <&pd_i2c1>;
602 pcie: pcie@fd0e0000 {
603 compatible = "xlnx,nwl-pcie-2.11";
605 #address-cells = <3>;
607 #interrupt-cells = <1>;
610 interrupt-parent = <&gic>;
611 interrupts = <0 118 4>,
614 <0 115 4>, /* MSI_1 [63...32] */
615 <0 114 4>; /* MSI_0 [31...0] */
616 interrupt-names = "misc","dummy","intx", "msi1", "msi0";
617 msi-parent = <&pcie>;
618 reg = <0x0 0xfd0e0000 0x1000>,
619 <0x0 0xfd480000 0x1000>,
620 <0x0 0xe0000000 0x1000000>;
621 reg-names = "breg", "pcireg", "cfg";
622 ranges = <0x02000000 0x00000000 0xe1000000 0x00000000 0xe1000000 0 0x0f000000>;
623 interrupt-map-mask = <0x0 0x0 0x0 0x7>;
624 interrupt-map = <0x0 0x0 0x0 0x1 &pcie_intc 0x1>,
625 <0x0 0x0 0x0 0x2 &pcie_intc 0x2>,
626 <0x0 0x0 0x0 0x3 &pcie_intc 0x3>,
627 <0x0 0x0 0x0 0x4 &pcie_intc 0x4>;
628 power-domains = <&pd_pcie>;
629 pcie_intc: legacy-interrupt-controller {
630 interrupt-controller;
631 #address-cells = <0>;
632 #interrupt-cells = <1>;
637 compatible = "xlnx,zynqmp-qspi-1.0";
639 clock-names = "ref_clk", "pclk";
640 interrupts = <0 15 4>;
641 interrupt-parent = <&gic>;
643 reg = <0x0 0xff0f0000 0x1000>,
644 <0x0 0xc0000000 0x8000000>;
645 #address-cells = <1>;
647 power-domains = <&pd_qspi>;
651 compatible = "xlnx,zynqmp-rtc";
653 reg = <0x0 0xffa60000 0x100>;
654 interrupt-parent = <&gic>;
655 interrupts = <0 26 4>, <0 27 4>;
656 interrupt-names = "alarm", "sec";
659 sata: ahci@fd0c0000 {
660 compatible = "ceva,ahci-1v84";
662 reg = <0x0 0xfd0c0000 0x2000>;
663 interrupt-parent = <&gic>;
664 interrupts = <0 133 4>;
665 power-domains = <&pd_sata>;
668 sdhci0: sdhci@ff160000 {
670 compatible = "arasan,sdhci-8.9a";
672 interrupt-parent = <&gic>;
673 interrupts = <0 48 4>;
674 reg = <0x0 0xff160000 0x1000>;
675 clock-names = "clk_xin", "clk_ahb";
677 power-domains = <&pd_sd0>;
680 sdhci1: sdhci@ff170000 {
682 compatible = "arasan,sdhci-8.9a";
684 interrupt-parent = <&gic>;
685 interrupts = <0 49 4>;
686 reg = <0x0 0xff170000 0x1000>;
687 clock-names = "clk_xin", "clk_ahb";
689 power-domains = <&pd_sd1>;
692 smmu: smmu@fd800000 {
693 compatible = "arm,mmu-500";
694 reg = <0x0 0xfd800000 0x20000>;
695 #global-interrupts = <1>;
696 interrupt-parent = <&gic>;
697 interrupts = <0 155 4>,
698 <0 155 4>, <0 155 4>, <0 155 4>, <0 155 4>,
699 <0 155 4>, <0 155 4>, <0 155 4>, <0 155 4>,
700 <0 155 4>, <0 155 4>, <0 155 4>, <0 155 4>,
701 <0 155 4>, <0 155 4>, <0 155 4>, <0 155 4>;
702 mmu-masters = < &gem0 0x874
709 compatible = "cdns,spi-r1p6";
711 interrupt-parent = <&gic>;
712 interrupts = <0 19 4>;
713 reg = <0x0 0xff040000 0x1000>;
714 clock-names = "ref_clk", "pclk";
715 #address-cells = <1>;
717 power-domains = <&pd_spi0>;
721 compatible = "cdns,spi-r1p6";
723 interrupt-parent = <&gic>;
724 interrupts = <0 20 4>;
725 reg = <0x0 0xff050000 0x1000>;
726 clock-names = "ref_clk", "pclk";
727 #address-cells = <1>;
729 power-domains = <&pd_spi1>;
732 ttc0: timer@ff110000 {
733 compatible = "cdns,ttc";
735 interrupt-parent = <&gic>;
736 interrupts = <0 36 4>, <0 37 4>, <0 38 4>;
737 reg = <0x0 0xff110000 0x1000>;
739 power-domains = <&pd_ttc0>;
742 ttc1: timer@ff120000 {
743 compatible = "cdns,ttc";
745 interrupt-parent = <&gic>;
746 interrupts = <0 39 4>, <0 40 4>, <0 41 4>;
747 reg = <0x0 0xff120000 0x1000>;
749 power-domains = <&pd_ttc1>;
752 ttc2: timer@ff130000 {
753 compatible = "cdns,ttc";
755 interrupt-parent = <&gic>;
756 interrupts = <0 42 4>, <0 43 4>, <0 44 4>;
757 reg = <0x0 0xff130000 0x1000>;
759 power-domains = <&pd_ttc2>;
762 ttc3: timer@ff140000 {
763 compatible = "cdns,ttc";
765 interrupt-parent = <&gic>;
766 interrupts = <0 45 4>, <0 46 4>, <0 47 4>;
767 reg = <0x0 0xff140000 0x1000>;
769 power-domains = <&pd_ttc3>;
772 uart0: serial@ff000000 {
774 compatible = "cdns,uart-r1p12", "xlnx,xuartps";
776 interrupt-parent = <&gic>;
777 interrupts = <0 21 4>;
778 reg = <0x0 0xff000000 0x1000>;
779 clock-names = "uart_clk", "pclk";
780 power-domains = <&pd_uart0>;
783 uart1: serial@ff010000 {
785 compatible = "cdns,uart-r1p12", "xlnx,xuartps";
787 interrupt-parent = <&gic>;
788 interrupts = <0 22 4>;
789 reg = <0x0 0xff010000 0x1000>;
790 clock-names = "uart_clk", "pclk";
791 power-domains = <&pd_uart1>;
795 #address-cells = <2>;
798 compatible = "xlnx,zynqmp-dwc3";
799 clock-names = "bus_clk", "ref_clk";
800 clocks = <&clk125>, <&clk125>;
801 power-domains = <&pd_usb0>;
804 dwc3_0: dwc3@fe200000 {
805 compatible = "snps,dwc3";
807 reg = <0x0 0xfe200000 0x40000>;
808 interrupt-parent = <&gic>;
809 interrupts = <0 65 4>;
810 /* snps,quirk-frame-length-adjustment = <0x20>; */
816 #address-cells = <2>;
819 compatible = "xlnx,zynqmp-dwc3";
820 clock-names = "bus_clk", "ref_clk";
821 clocks = <&clk125>, <&clk125>;
822 power-domains = <&pd_usb1>;
825 dwc3_1: dwc3@fe300000 {
826 compatible = "snps,dwc3";
828 reg = <0x0 0xfe300000 0x40000>;
829 interrupt-parent = <&gic>;
830 interrupts = <0 70 4>;
831 /* snps,quirk-frame-length-adjustment = <0x20>; */
836 watchdog0: watchdog@fd4d0000 {
837 compatible = "cdns,wdt-r1p2";
839 interrupt-parent = <&gic>;
840 interrupts = <0 113 1>;
841 reg = <0x0 0xfd4d0000 0x1000>;
845 xilinx_drm: xilinx_drm {
846 compatible = "xlnx,drm";
848 xlnx,encoder-slave = <&xlnx_dp>;
849 xlnx,connector-type = "DisplayPort";
850 xlnx,dp-sub = <&xlnx_dp_sub>;
852 xlnx,pixel-format = "rgb565";
854 dmas = <&xlnx_dpdma 3>;
858 dmas = <&xlnx_dpdma 0>;
864 xlnx_dp: dp@fd4a0000 {
865 compatible = "xlnx,v-dp";
867 reg = <0x0 0xfd4a0000 0x1000>,
868 <0x0 0xfd400000 0x20000>;
869 interrupts = <0 119 4>;
870 interrupt-parent = <&gic>;
871 clock-names = "aclk", "aud_clk";
872 xlnx,dp-version = "v1.2";
873 xlnx,max-lanes = <2>;
874 xlnx,max-link-rate = <540000>;
877 xlnx,colormetry = "rgb";
879 xlnx,audio-chan = <2>;
880 xlnx,dp-sub = <&xlnx_dp_sub>;
881 xlnx,max-pclock-frequency = <300000>;
884 xlnx_dp_snd_card: dp_snd_card {
885 compatible = "xlnx,dp-snd-card";
887 xlnx,dp-snd-pcm = <&xlnx_dp_snd_pcm0>, <&xlnx_dp_snd_pcm1>;
888 xlnx,dp-snd-codec = <&xlnx_dp_snd_codec0>;
891 xlnx_dp_snd_codec0: dp_snd_codec0 {
892 compatible = "xlnx,dp-snd-codec";
894 clock-names = "aud_clk";
897 xlnx_dp_snd_pcm0: dp_snd_pcm0 {
898 compatible = "xlnx,dp-snd-pcm";
900 dmas = <&xlnx_dpdma 4>;
904 xlnx_dp_snd_pcm1: dp_snd_pcm1 {
905 compatible = "xlnx,dp-snd-pcm";
907 dmas = <&xlnx_dpdma 5>;
911 xlnx_dp_sub: dp_sub@fd4aa000 {
912 compatible = "xlnx,dp-sub";
914 reg = <0x0 0xfd4aa000 0x1000>,
915 <0x0 0xfd4ab000 0x1000>,
916 <0x0 0xfd4ac000 0x1000>;
917 reg-names = "blend", "av_buf", "aud";
918 xlnx,output-fmt = "rgb";
919 xlnx,vid-fmt = "yuyv";
920 xlnx,gfx-fmt = "rgb565";
923 xlnx_dpdma: dma@fd4c0000 {
924 compatible = "xlnx,dpdma";
926 reg = <0x0 0xfd4c0000 0x1000>;
927 interrupts = <0 122 4>;
928 interrupt-parent = <&gic>;
929 clock-names = "axi_clk";
933 compatible = "xlnx,video0";
936 compatible = "xlnx,video1";
939 compatible = "xlnx,video2";
941 dma-graphicschannel {
942 compatible = "xlnx,graphics";
945 compatible = "xlnx,audio0";
948 compatible = "xlnx,audio1";