2 * dts file for Xilinx ZynqMP
4 * (C) Copyright 2014 - 2015, Xilinx, Inc.
6 * Michal Simek <michal.simek@xilinx.com>
8 * SPDX-License-Identifier: GPL-2.0+
11 compatible = "xlnx,zynqmp";
20 compatible = "arm,cortex-a53", "arm,armv8";
22 enable-method = "psci";
27 compatible = "arm,cortex-a53", "arm,armv8";
29 enable-method = "psci";
34 compatible = "arm,cortex-a53", "arm,armv8";
36 enable-method = "psci";
41 compatible = "arm,cortex-a53", "arm,armv8";
43 enable-method = "psci";
49 compatible = "arm,dcc";
55 compatible = "xlnx,zynqmp-genpd";
58 #power-domain-cells = <0x0>;
63 #power-domain-cells = <0x0>;
68 #power-domain-cells = <0x0>;
73 #power-domain-cells = <0x0>;
78 #power-domain-cells = <0x0>;
83 #power-domain-cells = <0x0>;
88 #power-domain-cells = <0x0>;
93 #power-domain-cells = <0x0>;
98 #power-domain-cells = <0x0>;
103 #power-domain-cells = <0x0>;
108 #power-domain-cells = <0x0>;
113 #power-domain-cells = <0x0>;
118 #power-domain-cells = <0x0>;
123 /* fixme: what to attach to */
124 #power-domain-cells = <0x0>;
129 #power-domain-cells = <0x0>;
134 #power-domain-cells = <0x0>;
139 #power-domain-cells = <0x0>;
144 #power-domain-cells = <0x0>;
149 #power-domain-cells = <0x0>;
154 #power-domain-cells = <0x0>;
159 #power-domain-cells = <0x0>;
164 #power-domain-cells = <0x0>;
169 #power-domain-cells = <0x0>;
174 #power-domain-cells = <0x0>;
179 #power-domain-cells = <0x0>;
184 #power-domain-cells = <0x0>;
189 #power-domain-cells = <0x0>;
194 #power-domain-cells = <0x0>;
199 #power-domain-cells = <0x0>;
200 pd-id = <0x3a 0x14 0x15>;
205 compatible = "arm,armv8-pmuv3";
206 interrupt-parent = <&gic>;
207 interrupts = <0 143 4>,
214 compatible = "arm,psci-0.2";
219 compatible = "xlnx,zynqmp-pm";
224 compatible = "arm,armv8-timer";
225 interrupt-parent = <&gic>;
226 interrupts = <1 13 0xf01>,
232 amba_apu: amba_apu@0 {
233 compatible = "simple-bus";
234 #address-cells = <2>;
236 ranges = <0 0 0 0 0xffffffff>;
238 gic: interrupt-controller@f9010000 {
239 compatible = "arm,gic-400", "arm,cortex-a15-gic";
240 #interrupt-cells = <3>;
241 reg = <0x0 0xf9010000 0x10000>,
242 <0x0 0xf9020000 0x20000>,
243 <0x0 0xf9040000 0x20000>,
244 <0x0 0xf9060000 0x20000>;
245 interrupt-controller;
246 interrupt-parent = <&gic>;
247 interrupts = <1 9 0xf04>;
252 compatible = "simple-bus";
254 #address-cells = <2>;
256 ranges = <0 0 0 0 0xffffffff>;
259 compatible = "xlnx,zynq-can-1.0";
261 clock-names = "can_clk", "pclk";
262 reg = <0x0 0xff060000 0x1000>;
263 interrupts = <0 23 4>;
264 interrupt-parent = <&gic>;
265 tx-fifo-depth = <0x40>;
266 rx-fifo-depth = <0x40>;
267 power-domains = <&pd_can0>;
271 compatible = "xlnx,zynq-can-1.0";
273 clock-names = "can_clk", "pclk";
274 reg = <0x0 0xff070000 0x1000>;
275 interrupts = <0 24 4>;
276 interrupt-parent = <&gic>;
277 tx-fifo-depth = <0x40>;
278 rx-fifo-depth = <0x40>;
279 power-domains = <&pd_can1>;
283 compatible = "arm,cci-400";
284 reg = <0x0 0xfd6e0000 0x9000>;
285 ranges = <0x0 0x0 0xfd6e0000 0x10000>;
286 #address-cells = <1>;
290 compatible = "arm,cci-400-pmu,r1";
291 reg = <0x9000 0x5000>;
292 interrupt-parent = <&gic>;
293 interrupts = <0 123 4>,
302 fpd_dma_chan1: dma@fd500000 {
304 compatible = "xlnx,zynqmp-dma-1.0";
305 reg = <0x0 0xfd500000 0x1000>;
306 interrupt-parent = <&gic>;
307 interrupts = <0 124 4>;
308 clock-names = "clk_main", "clk_apb";
309 xlnx,bus-width = <128>;
310 power-domains = <&pd_gdma>;
313 fpd_dma_chan2: dma@fd510000 {
315 compatible = "xlnx,zynqmp-dma-1.0";
316 reg = <0x0 0xfd510000 0x1000>;
317 interrupt-parent = <&gic>;
318 interrupts = <0 125 4>;
319 clock-names = "clk_main", "clk_apb";
320 xlnx,bus-width = <128>;
321 power-domains = <&pd_gdma>;
324 fpd_dma_chan3: dma@fd520000 {
326 compatible = "xlnx,zynqmp-dma-1.0";
327 reg = <0x0 0xfd520000 0x1000>;
328 interrupt-parent = <&gic>;
329 interrupts = <0 126 4>;
330 clock-names = "clk_main", "clk_apb";
331 xlnx,bus-width = <128>;
332 power-domains = <&pd_gdma>;
335 fpd_dma_chan4: dma@fd530000 {
337 compatible = "xlnx,zynqmp-dma-1.0";
338 reg = <0x0 0xfd530000 0x1000>;
339 interrupt-parent = <&gic>;
340 interrupts = <0 127 4>;
341 clock-names = "clk_main", "clk_apb";
342 xlnx,bus-width = <128>;
343 power-domains = <&pd_gdma>;
346 fpd_dma_chan5: dma@fd540000 {
348 compatible = "xlnx,zynqmp-dma-1.0";
349 reg = <0x0 0xfd540000 0x1000>;
350 interrupt-parent = <&gic>;
351 interrupts = <0 128 4>;
352 clock-names = "clk_main", "clk_apb";
353 xlnx,bus-width = <128>;
354 power-domains = <&pd_gdma>;
357 fpd_dma_chan6: dma@fd550000 {
359 compatible = "xlnx,zynqmp-dma-1.0";
360 reg = <0x0 0xfd550000 0x1000>;
361 interrupt-parent = <&gic>;
362 interrupts = <0 129 4>;
363 clock-names = "clk_main", "clk_apb";
364 xlnx,bus-width = <128>;
365 power-domains = <&pd_gdma>;
368 fpd_dma_chan7: dma@fd560000 {
370 compatible = "xlnx,zynqmp-dma-1.0";
371 reg = <0x0 0xfd560000 0x1000>;
372 interrupt-parent = <&gic>;
373 interrupts = <0 130 4>;
374 clock-names = "clk_main", "clk_apb";
375 xlnx,bus-width = <128>;
376 power-domains = <&pd_gdma>;
379 fpd_dma_chan8: dma@fd570000 {
381 compatible = "xlnx,zynqmp-dma-1.0";
382 reg = <0x0 0xfd570000 0x1000>;
383 interrupt-parent = <&gic>;
384 interrupts = <0 131 4>;
385 clock-names = "clk_main", "clk_apb";
386 xlnx,bus-width = <128>;
387 power-domains = <&pd_gdma>;
392 compatible = "arm,mali-400", "arm,mali-utgard";
393 reg = <0x0 0xfd4b0000 0x30000>;
394 interrupt-parent = <&gic>;
395 interrupts = <0 132 4>, <0 132 4>, <0 132 4>, <0 132 4>, <0 132 4>, <0 132 4>;
396 interrupt-names = "IRQGP", "IRQGPMMU", "IRQPP0", "IRQPPMMU0", "IRQPP1", "IRQPPMMU1";
397 power-domains = <&pd_gpu>;
401 lpd_dma_chan1: dma@ffa80000 {
403 compatible = "xlnx,zynqmp-dma-1.0";
404 reg = <0x0 0xffa80000 0x1000>;
405 interrupt-parent = <&gic>;
406 interrupts = <0 77 4>;
407 xlnx,bus-width = <64>;
408 power-domains = <&pd_adma>;
411 lpd_dma_chan2: dma@ffa90000 {
413 compatible = "xlnx,zynqmp-dma-1.0";
414 reg = <0x0 0xffa90000 0x1000>;
415 interrupt-parent = <&gic>;
416 interrupts = <0 78 4>;
417 xlnx,bus-width = <64>;
418 power-domains = <&pd_adma>;
421 lpd_dma_chan3: dma@ffaa0000 {
423 compatible = "xlnx,zynqmp-dma-1.0";
424 reg = <0x0 0xffaa0000 0x1000>;
425 interrupt-parent = <&gic>;
426 interrupts = <0 79 4>;
427 xlnx,bus-width = <64>;
428 power-domains = <&pd_adma>;
431 lpd_dma_chan4: dma@ffab0000 {
433 compatible = "xlnx,zynqmp-dma-1.0";
434 reg = <0x0 0xffab0000 0x1000>;
435 interrupt-parent = <&gic>;
436 interrupts = <0 80 4>;
437 xlnx,bus-width = <64>;
438 power-domains = <&pd_adma>;
441 lpd_dma_chan5: dma@ffac0000 {
443 compatible = "xlnx,zynqmp-dma-1.0";
444 reg = <0x0 0xffac0000 0x1000>;
445 interrupt-parent = <&gic>;
446 interrupts = <0 81 4>;
447 xlnx,bus-width = <64>;
448 power-domains = <&pd_adma>;
451 lpd_dma_chan6: dma@ffad0000 {
453 compatible = "xlnx,zynqmp-dma-1.0";
454 reg = <0x0 0xffad0000 0x1000>;
455 interrupt-parent = <&gic>;
456 interrupts = <0 82 4>;
457 xlnx,bus-width = <64>;
458 power-domains = <&pd_adma>;
461 lpd_dma_chan7: dma@ffae0000 {
463 compatible = "xlnx,zynqmp-dma-1.0";
464 reg = <0x0 0xffae0000 0x1000>;
465 interrupt-parent = <&gic>;
466 interrupts = <0 83 4>;
467 xlnx,bus-width = <64>;
468 power-domains = <&pd_adma>;
471 lpd_dma_chan8: dma@ffaf0000 {
473 compatible = "xlnx,zynqmp-dma-1.0";
474 reg = <0x0 0xffaf0000 0x1000>;
475 interrupt-parent = <&gic>;
476 interrupts = <0 84 4>;
477 xlnx,bus-width = <64>;
478 power-domains = <&pd_adma>;
481 mc: memory-controller@fd070000 {
482 compatible = "xlnx,zynqmp-ddrc-2.40a";
483 reg = <0x0 0xfd070000 0x30000>;
484 interrupt-parent = <&gic>;
485 interrupts = <0 112 4>;
488 nand0: nand@ff100000 {
489 compatible = "arasan,nfc-v3p10";
491 reg = <0x0 0xff100000 0x1000>;
492 clock-names = "clk_sys", "clk_flash";
493 interrupt-parent = <&gic>;
494 interrupts = <0 14 4>;
495 #address-cells = <2>;
497 power-domains = <&pd_nand>;
500 gem0: ethernet@ff0b0000 {
501 compatible = "cdns,zynqmp-gem";
503 interrupt-parent = <&gic>;
504 interrupts = <0 57 4>, <0 57 4>;
505 reg = <0x0 0xff0b0000 0x1000>;
506 clock-names = "pclk", "hclk", "tx_clk";
507 #address-cells = <1>;
509 #stream-id-cells = <1>;
510 power-domains = <&pd_eth0>;
513 gem1: ethernet@ff0c0000 {
514 compatible = "cdns,zynqmp-gem";
516 interrupt-parent = <&gic>;
517 interrupts = <0 59 4>, <0 59 4>;
518 reg = <0x0 0xff0c0000 0x1000>;
519 clock-names = "pclk", "hclk", "tx_clk";
520 #address-cells = <1>;
522 #stream-id-cells = <1>;
523 power-domains = <&pd_eth1>;
526 gem2: ethernet@ff0d0000 {
527 compatible = "cdns,zynqmp-gem";
529 interrupt-parent = <&gic>;
530 interrupts = <0 61 4>, <0 61 4>;
531 reg = <0x0 0xff0d0000 0x1000>;
532 clock-names = "pclk", "hclk", "tx_clk";
533 #address-cells = <1>;
535 #stream-id-cells = <1>;
536 power-domains = <&pd_eth2>;
539 gem3: ethernet@ff0e0000 {
540 compatible = "cdns,zynqmp-gem";
542 interrupt-parent = <&gic>;
543 interrupts = <0 63 4>, <0 63 4>;
544 reg = <0x0 0xff0e0000 0x1000>;
545 clock-names = "pclk", "hclk", "tx_clk";
546 #address-cells = <1>;
548 #stream-id-cells = <1>;
549 power-domains = <&pd_eth3>;
552 gpio: gpio@ff0a0000 {
553 compatible = "xlnx,zynqmp-gpio-1.0";
556 interrupt-parent = <&gic>;
557 interrupts = <0 16 4>;
558 interrupt-controller;
559 #interrupt-cells = <2>;
560 reg = <0x0 0xff0a0000 0x1000>;
561 power-domains = <&pd_gpio>;
565 compatible = "cdns,i2c-r1p10";
567 interrupt-parent = <&gic>;
568 interrupts = <0 17 4>;
569 reg = <0x0 0xff020000 0x1000>;
570 #address-cells = <1>;
572 power-domains = <&pd_i2c0>;
576 compatible = "cdns,i2c-r1p10";
578 interrupt-parent = <&gic>;
579 interrupts = <0 18 4>;
580 reg = <0x0 0xff030000 0x1000>;
581 #address-cells = <1>;
583 power-domains = <&pd_i2c1>;
586 pcie: pcie@fd0e0000 {
587 compatible = "xlnx,nwl-pcie-2.11";
589 #address-cells = <3>;
591 #interrupt-cells = <1>;
594 interrupt-parent = <&gic>;
595 interrupts = <0 118 4>,
598 <0 115 4>, /* MSI_1 [63...32] */
599 <0 114 4>; /* MSI_0 [31...0] */
600 interrupt-names = "misc","dummy","intx", "msi1", "msi0";
601 msi-parent = <&pcie>;
602 reg = <0x0 0xfd0e0000 0x1000>,
603 <0x0 0xfd480000 0x1000>,
604 <0x0 0xe0000000 0x1000000>;
605 reg-names = "breg", "pcireg", "cfg";
606 ranges = <0x02000000 0x00000000 0xe1000000 0x00000000 0xe1000000 0 0x0f000000>;
607 interrupt-map-mask = <0x0 0x0 0x0 0x7>;
608 interrupt-map = <0x0 0x0 0x0 0x1 &pcie_intc 0x1>,
609 <0x0 0x0 0x0 0x2 &pcie_intc 0x2>,
610 <0x0 0x0 0x0 0x3 &pcie_intc 0x3>,
611 <0x0 0x0 0x0 0x4 &pcie_intc 0x4>;
612 power-domains = <&pd_pcie>;
613 pcie_intc: legacy-interrupt-controller {
614 interrupt-controller;
615 #address-cells = <0>;
616 #interrupt-cells = <1>;
621 compatible = "xlnx,zynqmp-qspi-1.0";
623 clock-names = "ref_clk", "pclk";
624 interrupts = <0 15 4>;
625 interrupt-parent = <&gic>;
627 reg = <0x0 0xff0f0000 0x1000>,
628 <0x0 0xc0000000 0x8000000>;
629 #address-cells = <1>;
631 power-domains = <&pd_qspi>;
635 compatible = "xlnx,zynqmp-rtc";
637 reg = <0x0 0xffa60000 0x100>;
638 interrupt-parent = <&gic>;
639 interrupts = <0 26 4>, <0 27 4>;
640 interrupt-names = "alarm", "sec";
643 sata: ahci@fd0c0000 {
644 compatible = "ceva,ahci-1v84";
646 reg = <0x0 0xfd0c0000 0x2000>;
647 interrupt-parent = <&gic>;
648 interrupts = <0 133 4>;
649 power-domains = <&pd_sata>;
652 sdhci0: sdhci@ff160000 {
654 compatible = "arasan,sdhci-8.9a";
656 interrupt-parent = <&gic>;
657 interrupts = <0 48 4>;
658 reg = <0x0 0xff160000 0x1000>;
659 clock-names = "clk_xin", "clk_ahb";
661 power-domains = <&pd_sd0>;
664 sdhci1: sdhci@ff170000 {
666 compatible = "arasan,sdhci-8.9a";
668 interrupt-parent = <&gic>;
669 interrupts = <0 49 4>;
670 reg = <0x0 0xff170000 0x1000>;
671 clock-names = "clk_xin", "clk_ahb";
673 power-domains = <&pd_sd1>;
676 smmu: smmu@fd800000 {
677 compatible = "arm,mmu-500";
678 reg = <0x0 0xfd800000 0x20000>;
679 #global-interrupts = <1>;
680 interrupt-parent = <&gic>;
681 interrupts = <0 155 4>,
682 <0 155 4>, <0 155 4>, <0 155 4>, <0 155 4>,
683 <0 155 4>, <0 155 4>, <0 155 4>, <0 155 4>,
684 <0 155 4>, <0 155 4>, <0 155 4>, <0 155 4>,
685 <0 155 4>, <0 155 4>, <0 155 4>, <0 155 4>;
686 mmu-masters = < &gem0 0x874
693 compatible = "cdns,spi-r1p6";
695 interrupt-parent = <&gic>;
696 interrupts = <0 19 4>;
697 reg = <0x0 0xff040000 0x1000>;
698 clock-names = "ref_clk", "pclk";
699 #address-cells = <1>;
701 power-domains = <&pd_spi0>;
705 compatible = "cdns,spi-r1p6";
707 interrupt-parent = <&gic>;
708 interrupts = <0 20 4>;
709 reg = <0x0 0xff050000 0x1000>;
710 clock-names = "ref_clk", "pclk";
711 #address-cells = <1>;
713 power-domains = <&pd_spi1>;
716 ttc0: timer@ff110000 {
717 compatible = "cdns,ttc";
719 interrupt-parent = <&gic>;
720 interrupts = <0 36 4>, <0 37 4>, <0 38 4>;
721 reg = <0x0 0xff110000 0x1000>;
723 power-domains = <&pd_ttc0>;
726 ttc1: timer@ff120000 {
727 compatible = "cdns,ttc";
729 interrupt-parent = <&gic>;
730 interrupts = <0 39 4>, <0 40 4>, <0 41 4>;
731 reg = <0x0 0xff120000 0x1000>;
733 power-domains = <&pd_ttc1>;
736 ttc2: timer@ff130000 {
737 compatible = "cdns,ttc";
739 interrupt-parent = <&gic>;
740 interrupts = <0 42 4>, <0 43 4>, <0 44 4>;
741 reg = <0x0 0xff130000 0x1000>;
743 power-domains = <&pd_ttc2>;
746 ttc3: timer@ff140000 {
747 compatible = "cdns,ttc";
749 interrupt-parent = <&gic>;
750 interrupts = <0 45 4>, <0 46 4>, <0 47 4>;
751 reg = <0x0 0xff140000 0x1000>;
753 power-domains = <&pd_ttc3>;
756 uart0: serial@ff000000 {
758 compatible = "cdns,uart-r1p12", "xlnx,xuartps";
760 interrupt-parent = <&gic>;
761 interrupts = <0 21 4>;
762 reg = <0x0 0xff000000 0x1000>;
763 clock-names = "uart_clk", "pclk";
764 power-domains = <&pd_uart0>;
767 uart1: serial@ff010000 {
769 compatible = "cdns,uart-r1p12", "xlnx,xuartps";
771 interrupt-parent = <&gic>;
772 interrupts = <0 22 4>;
773 reg = <0x0 0xff010000 0x1000>;
774 clock-names = "uart_clk", "pclk";
775 power-domains = <&pd_uart1>;
779 #address-cells = <2>;
782 compatible = "xlnx,zynqmp-dwc3";
783 clock-names = "bus_clk", "ref_clk";
784 clocks = <&clk125>, <&clk125>;
785 power-domains = <&pd_usb0>;
788 dwc3_0: dwc3@fe200000 {
789 compatible = "snps,dwc3";
791 reg = <0x0 0xfe200000 0x40000>;
792 interrupt-parent = <&gic>;
793 interrupts = <0 65 4>;
794 /* snps,quirk-frame-length-adjustment = <0x20>; */
800 #address-cells = <2>;
803 compatible = "xlnx,zynqmp-dwc3";
804 clock-names = "bus_clk", "ref_clk";
805 clocks = <&clk125>, <&clk125>;
806 power-domains = <&pd_usb1>;
809 dwc3_1: dwc3@fe300000 {
810 compatible = "snps,dwc3";
812 reg = <0x0 0xfe300000 0x40000>;
813 interrupt-parent = <&gic>;
814 interrupts = <0 70 4>;
815 /* snps,quirk-frame-length-adjustment = <0x20>; */
820 watchdog0: watchdog@fd4d0000 {
821 compatible = "cdns,wdt-r1p2";
823 interrupt-parent = <&gic>;
824 interrupts = <0 113 1>;
825 reg = <0x0 0xfd4d0000 0x1000>;
829 xilinx_drm: xilinx_drm {
830 compatible = "xlnx,drm";
832 xlnx,encoder-slave = <&xlnx_dp>;
833 xlnx,connector-type = "DisplayPort";
834 xlnx,dp-sub = <&xlnx_dp_sub>;
836 xlnx,pixel-format = "rgb565";
838 dmas = <&xlnx_dpdma 3>;
842 dmas = <&xlnx_dpdma 0>,
845 dma-names = "dma0", "dma1", "dma2";
850 xlnx_dp: dp@fd4a0000 {
851 compatible = "xlnx,v-dp";
853 reg = <0x0 0xfd4a0000 0x1000>;
854 interrupts = <0 119 4>;
855 interrupt-parent = <&gic>;
856 clock-names = "aclk", "aud_clk";
857 xlnx,dp-version = "v1.2";
858 xlnx,max-lanes = <2>;
859 xlnx,max-link-rate = <540000>;
862 xlnx,colormetry = "rgb";
864 xlnx,audio-chan = <2>;
865 xlnx,dp-sub = <&xlnx_dp_sub>;
866 xlnx,max-pclock-frequency = <300000>;
869 xlnx_dp_snd_card: dp_snd_card {
870 compatible = "xlnx,dp-snd-card";
872 xlnx,dp-snd-pcm = <&xlnx_dp_snd_pcm0>, <&xlnx_dp_snd_pcm1>;
873 xlnx,dp-snd-codec = <&xlnx_dp_snd_codec0>;
876 xlnx_dp_snd_codec0: dp_snd_codec0 {
877 compatible = "xlnx,dp-snd-codec";
879 clock-names = "aud_clk";
882 xlnx_dp_snd_pcm0: dp_snd_pcm0 {
883 compatible = "xlnx,dp-snd-pcm";
885 dmas = <&xlnx_dpdma 4>;
889 xlnx_dp_snd_pcm1: dp_snd_pcm1 {
890 compatible = "xlnx,dp-snd-pcm";
892 dmas = <&xlnx_dpdma 5>;
896 xlnx_dp_sub: dp_sub@fd4aa000 {
897 compatible = "xlnx,dp-sub";
899 reg = <0x0 0xfd4aa000 0x1000>,
900 <0x0 0xfd4ab000 0x1000>,
901 <0x0 0xfd4ac000 0x1000>;
902 reg-names = "blend", "av_buf", "aud";
903 xlnx,output-fmt = "rgb";
904 xlnx,vid-fmt = "yuyv";
905 xlnx,gfx-fmt = "rgb565";
908 xlnx_dpdma: dma@fd4c0000 {
909 compatible = "xlnx,dpdma";
911 reg = <0x0 0xfd4c0000 0x1000>;
912 interrupts = <0 122 4>;
913 interrupt-parent = <&gic>;
914 clock-names = "axi_clk";
918 compatible = "xlnx,video0";
921 compatible = "xlnx,video1";
924 compatible = "xlnx,video2";
926 dma-graphicschannel {
927 compatible = "xlnx,graphics";
930 compatible = "xlnx,audio0";
933 compatible = "xlnx,audio1";