2 * dts file for Xilinx ZynqMP
4 * (C) Copyright 2014 - 2015, Xilinx, Inc.
6 * Michal Simek <michal.simek@xilinx.com>
8 * SPDX-License-Identifier: GPL-2.0+
11 compatible = "xlnx,zynqmp";
20 compatible = "arm,cortex-a53", "arm,armv8";
22 enable-method = "psci";
27 compatible = "arm,cortex-a53", "arm,armv8";
29 enable-method = "psci";
34 compatible = "arm,cortex-a53", "arm,armv8";
36 enable-method = "psci";
41 compatible = "arm,cortex-a53", "arm,armv8";
43 enable-method = "psci";
49 compatible = "xlnx,zynqmp-genpd";
52 #power-domain-cells = <0x0>;
57 #power-domain-cells = <0x0>;
62 #power-domain-cells = <0x0>;
67 #power-domain-cells = <0x0>;
72 #power-domain-cells = <0x0>;
77 #power-domain-cells = <0x0>;
82 #power-domain-cells = <0x0>;
87 #power-domain-cells = <0x0>;
92 #power-domain-cells = <0x0>;
97 #power-domain-cells = <0x0>;
102 #power-domain-cells = <0x0>;
107 #power-domain-cells = <0x0>;
112 #power-domain-cells = <0x0>;
117 /* fixme: what to attach to */
118 #power-domain-cells = <0x0>;
123 #power-domain-cells = <0x0>;
128 #power-domain-cells = <0x0>;
133 #power-domain-cells = <0x0>;
138 #power-domain-cells = <0x0>;
143 #power-domain-cells = <0x0>;
148 #power-domain-cells = <0x0>;
153 #power-domain-cells = <0x0>;
158 #power-domain-cells = <0x0>;
163 #power-domain-cells = <0x0>;
168 #power-domain-cells = <0x0>;
173 #power-domain-cells = <0x0>;
178 #power-domain-cells = <0x0>;
183 #power-domain-cells = <0x0>;
188 #power-domain-cells = <0x0>;
193 #power-domain-cells = <0x0>;
198 #power-domain-cells = <0x0>;
203 #power-domain-cells = <0x0>;
208 #power-domain-cells = <0x0>;
213 #power-domain-cells = <0x0>;
219 compatible = "arm,armv8-pmuv3";
220 interrupts = <0 143 4>,
227 compatible = "arm,psci-0.2";
232 compatible = "xlnx,zynqmp-pm";
237 compatible = "arm,armv8-timer";
238 interrupt-parent = <&gic>;
239 interrupts = <1 13 0xf01>,
246 compatible = "simple-bus";
247 #address-cells = <2>;
251 gic: interrupt-controller@f9010000 {
252 compatible = "arm,gic-400", "arm,cortex-a15-gic";
253 #interrupt-cells = <3>;
254 reg = <0x0 0xf9010000 0x10000>,
255 <0x0 0xf902f000 0x2000>,
256 <0x0 0xf9040000 0x20000>,
257 <0x0 0xf906f000 0x2000>;
258 interrupt-controller;
259 interrupt-parent = <&gic>;
260 interrupts = <1 9 0xf04>;
265 compatible = "simple-bus";
266 #address-cells = <2>;
271 compatible = "xlnx,zynq-can-1.0";
273 clock-names = "can_clk", "pclk";
274 reg = <0x0 0xff060000 0x1000>;
275 interrupts = <0 23 4>;
276 interrupt-parent = <&gic>;
277 tx-fifo-depth = <0x40>;
278 rx-fifo-depth = <0x40>;
279 power-domains = <&pd_can0>;
283 compatible = "xlnx,zynq-can-1.0";
285 clock-names = "can_clk", "pclk";
286 reg = <0x0 0xff070000 0x1000>;
287 interrupts = <0 24 4>;
288 interrupt-parent = <&gic>;
289 tx-fifo-depth = <0x40>;
290 rx-fifo-depth = <0x40>;
291 power-domains = <&pd_can1>;
295 fpd_dma_chan1: dma@fd500000 {
297 compatible = "xlnx,zynqmp-dma-1.0";
298 reg = <0x0 0xfd500000 0x1000>;
299 interrupt-parent = <&gic>;
300 interrupts = <0 124 4>;
302 xlnx,bus-width = <128>;
303 power-domains = <&pd_gdma>;
306 fpd_dma_chan2: dma@fd510000 {
308 compatible = "xlnx,zynqmp-dma-1.0";
309 reg = <0x0 0xfd510000 0x1000>;
310 interrupt-parent = <&gic>;
311 interrupts = <0 125 4>;
313 xlnx,bus-width = <128>;
314 power-domains = <&pd_gdma>;
317 fpd_dma_chan3: dma@fd520000 {
319 compatible = "xlnx,zynqmp-dma-1.0";
320 reg = <0x0 0xfd520000 0x1000>;
321 interrupt-parent = <&gic>;
322 interrupts = <0 126 4>;
324 xlnx,bus-width = <128>;
325 power-domains = <&pd_gdma>;
328 fpd_dma_chan4: dma@fd530000 {
330 compatible = "xlnx,zynqmp-dma-1.0";
331 reg = <0x0 0xfd530000 0x1000>;
332 interrupt-parent = <&gic>;
333 interrupts = <0 127 4>;
335 xlnx,bus-width = <128>;
336 power-domains = <&pd_gdma>;
339 fpd_dma_chan5: dma@fd540000 {
341 compatible = "xlnx,zynqmp-dma-1.0";
342 reg = <0x0 0xfd540000 0x1000>;
343 interrupt-parent = <&gic>;
344 interrupts = <0 128 4>;
346 xlnx,bus-width = <128>;
347 power-domains = <&pd_gdma>;
350 fpd_dma_chan6: dma@fd550000 {
352 compatible = "xlnx,zynqmp-dma-1.0";
353 reg = <0x0 0xfd550000 0x1000>;
354 interrupt-parent = <&gic>;
355 interrupts = <0 129 4>;
357 xlnx,bus-width = <128>;
358 power-domains = <&pd_gdma>;
361 fpd_dma_chan7: dma@fd560000 {
363 compatible = "xlnx,zynqmp-dma-1.0";
364 reg = <0x0 0xfd560000 0x1000>;
365 interrupt-parent = <&gic>;
366 interrupts = <0 130 4>;
368 xlnx,bus-width = <128>;
369 power-domains = <&pd_gdma>;
372 fpd_dma_chan8: dma@fd570000 {
374 compatible = "xlnx,zynqmp-dma-1.0";
375 reg = <0x0 0xfd570000 0x1000>;
376 interrupt-parent = <&gic>;
377 interrupts = <0 131 4>;
379 xlnx,bus-width = <128>;
380 power-domains = <&pd_gdma>;
385 compatible = "arm,mali-400", "arm,mali-utgard";
386 reg = <0x0 0xfd4b0000 0x30000>;
387 interrupt-parent = <&gic>;
388 interrupts = <0 132 4>, <0 132 4>, <0 132 4>, <0 132 4>, <0 132 4>, <0 132 4>;
389 interrupt-names = "IRQGP", "IRQGPMMU", "IRQPP0", "IRQPPMMU0", "IRQPP1", "IRQPPMMU1";
393 lpd_dma_chan1: dma@ffa80000 {
395 compatible = "xlnx,zynqmp-dma-1.0";
396 reg = <0x0 0xffa80000 0x1000>;
397 interrupt-parent = <&gic>;
398 interrupts = <0 77 4>;
400 xlnx,bus-width = <64>;
401 power-domains = <&pd_adma>;
404 lpd_dma_chan2: dma@ffa90000 {
406 compatible = "xlnx,zynqmp-dma-1.0";
407 reg = <0x0 0xffa90000 0x1000>;
408 interrupt-parent = <&gic>;
409 interrupts = <0 78 4>;
411 xlnx,bus-width = <64>;
412 power-domains = <&pd_adma>;
415 lpd_dma_chan3: dma@ffaa0000 {
417 compatible = "xlnx,zynqmp-dma-1.0";
418 reg = <0x0 0xffaa0000 0x1000>;
419 interrupt-parent = <&gic>;
420 interrupts = <0 79 4>;
422 xlnx,bus-width = <64>;
423 power-domains = <&pd_adma>;
426 lpd_dma_chan4: dma@ffab0000 {
428 compatible = "xlnx,zynqmp-dma-1.0";
429 reg = <0x0 0xffab0000 0x1000>;
430 interrupt-parent = <&gic>;
431 interrupts = <0 80 4>;
433 xlnx,bus-width = <64>;
434 power-domains = <&pd_adma>;
437 lpd_dma_chan5: dma@ffac0000 {
439 compatible = "xlnx,zynqmp-dma-1.0";
440 reg = <0x0 0xffac0000 0x1000>;
441 interrupt-parent = <&gic>;
442 interrupts = <0 81 4>;
444 xlnx,bus-width = <64>;
445 power-domains = <&pd_adma>;
448 lpd_dma_chan6: dma@ffad0000 {
450 compatible = "xlnx,zynqmp-dma-1.0";
451 reg = <0x0 0xffad0000 0x1000>;
452 interrupt-parent = <&gic>;
453 interrupts = <0 82 4>;
455 xlnx,bus-width = <64>;
456 power-domains = <&pd_adma>;
459 lpd_dma_chan7: dma@ffae0000 {
461 compatible = "xlnx,zynqmp-dma-1.0";
462 reg = <0x0 0xffae0000 0x1000>;
463 interrupt-parent = <&gic>;
464 interrupts = <0 83 4>;
466 xlnx,bus-width = <64>;
467 power-domains = <&pd_adma>;
470 lpd_dma_chan8: dma@ffaf0000 {
472 compatible = "xlnx,zynqmp-dma-1.0";
473 reg = <0x0 0xffaf0000 0x1000>;
474 interrupt-parent = <&gic>;
475 interrupts = <0 84 4>;
477 xlnx,bus-width = <64>;
478 power-domains = <&pd_adma>;
481 nand0: nand@ff100000 {
482 compatible = "arasan,nfc-v3p10";
484 reg = <0x0 0xff100000 0x1000>;
485 clock-names = "clk_sys", "clk_flash";
486 interrupt-parent = <&gic>;
487 interrupts = <0 14 4>;
488 #address-cells = <2>;
490 power-domains = <&pd_nand>;
493 gem0: ethernet@ff0b0000 {
494 compatible = "cdns,zynqmp-gem";
496 interrupt-parent = <&gic>;
497 interrupts = <0 57 4>, <0 57 4>;
498 reg = <0x0 0xff0b0000 0x1000>;
499 clock-names = "pclk", "hclk", "tx_clk";
500 #address-cells = <1>;
502 #stream-id-cells = <1>;
503 power-domains = <&pd_eth0>;
506 gem1: ethernet@ff0c0000 {
507 compatible = "cdns,zynqmp-gem";
509 interrupt-parent = <&gic>;
510 interrupts = <0 59 4>, <0 59 4>;
511 reg = <0x0 0xff0c0000 0x1000>;
512 clock-names = "pclk", "hclk", "tx_clk";
513 #address-cells = <1>;
515 #stream-id-cells = <1>;
516 power-domains = <&pd_eth1>;
519 gem2: ethernet@ff0d0000 {
520 compatible = "cdns,zynqmp-gem";
522 interrupt-parent = <&gic>;
523 interrupts = <0 61 4>, <0 61 4>;
524 reg = <0x0 0xff0d0000 0x1000>;
525 clock-names = "pclk", "hclk", "tx_clk";
526 #address-cells = <1>;
528 #stream-id-cells = <1>;
529 power-domains = <&pd_eth2>;
532 gem3: ethernet@ff0e0000 {
533 compatible = "cdns,zynqmp-gem";
535 interrupt-parent = <&gic>;
536 interrupts = <0 63 4>, <0 63 4>;
537 reg = <0x0 0xff0e0000 0x1000>;
538 clock-names = "pclk", "hclk", "tx_clk";
539 #address-cells = <1>;
541 #stream-id-cells = <1>;
542 power-domains = <&pd_eth3>;
545 gpio: gpio@ff0a0000 {
546 compatible = "xlnx,zynqmp-gpio-1.0";
549 interrupt-parent = <&gic>;
550 interrupts = <0 16 4>;
551 reg = <0x0 0xff0a0000 0x1000>;
552 power-domains = <&pd_gpio>;
556 compatible = "cdns,i2c-r1p10";
558 interrupt-parent = <&gic>;
559 interrupts = <0 17 4>;
560 reg = <0x0 0xff020000 0x1000>;
561 #address-cells = <1>;
563 power-domains = <&pd_i2c0>;
567 compatible = "cdns,i2c-r1p10";
569 interrupt-parent = <&gic>;
570 interrupts = <0 18 4>;
571 reg = <0x0 0xff030000 0x1000>;
572 #address-cells = <1>;
574 power-domains = <&pd_i2c1>;
577 pcie: pcie@fd0e0000 {
578 compatible = "xlnx,nwl-pcie-2.11";
580 #address-cells = <3>;
582 #interrupt-cells = <1>;
584 interrupt-parent = <&gic>;
585 interrupts = < 0 118 4>,
587 < 0 115 4>, /* MSI_1 [63...32] */
588 < 0 114 4 >; /* MSI_0 [31...0] */
589 interrupt-names = "misc", "intx", "msi_1", "msi_0";
590 reg = <0x0 0xfd0e0000 0x1000>,
591 <0x0 0xfd480000 0x1000>,
592 <0x0 0xe0000000 0x1000000>;
593 reg-names = "breg", "pcireg", "cfg";
594 ranges = <0x02000000 0x00000000 0xe1000000 0x00000000 0xe1000000 0 0x0f000000>;
598 compatible = "xlnx,zynqmp-qspi-1.0";
600 clock-names = "ref_clk", "pclk";
601 interrupts = <0 15 4>;
602 interrupt-parent = <&gic>;
604 reg = <0x0 0xff0f0000 0x1000 0x0 0xc0000000 0x8000000>;
605 #address-cells = <1>;
607 power-domains = <&pd_qspi>;
611 compatible = "xlnx,zynqmp-rtc";
613 reg = <0x0 0xffa60000 0x100>;
614 interrupt-parent = <&gic>;
615 interrupts = <0 26 4>, <0 27 4>;
616 interrupt-names = "alarm", "sec";
619 sata: ahci@fd0c0000 {
620 compatible = "ceva,ahci-1v84";
622 reg = <0x0 0xfd0c0000 0x2000>;
623 interrupt-parent = <&gic>;
624 interrupts = <0 133 4>;
625 power-domains = <&pd_sata>;
628 sdhci0: sdhci@ff160000 {
629 compatible = "arasan,sdhci-8.9a";
631 interrupt-parent = <&gic>;
632 interrupts = <0 48 4>;
633 reg = <0x0 0xff160000 0x1000>;
634 clock-names = "clk_xin", "clk_ahb";
636 power-domains = <&pd_sd0>;
639 sdhci1: sdhci@ff170000 {
640 compatible = "arasan,sdhci-8.9a";
642 interrupt-parent = <&gic>;
643 interrupts = <0 49 4>;
644 reg = <0x0 0xff170000 0x1000>;
645 clock-names = "clk_xin", "clk_ahb";
647 power-domains = <&pd_sd1>;
650 smmu: smmu@fd800000 {
651 compatible = "arm,mmu-500";
652 reg = <0x0 0xfd800000 0x20000>;
653 #global-interrupts = <1>;
654 interrupt-parent = <&gic>;
655 interrupts = <0 155 4>,
656 <0 155 4>, <0 155 4>, <0 155 4>, <0 155 4>,
657 <0 155 4>, <0 155 4>, <0 155 4>, <0 155 4>,
658 <0 155 4>, <0 155 4>, <0 155 4>, <0 155 4>,
659 <0 155 4>, <0 155 4>, <0 155 4>, <0 155 4>;
660 mmu-masters = < &gem0 0x874
667 compatible = "cdns,spi-r1p6";
669 interrupt-parent = <&gic>;
670 interrupts = <0 19 4>;
671 reg = <0x0 0xff040000 0x1000>;
672 clock-names = "ref_clk", "pclk";
673 #address-cells = <1>;
675 power-domains = <&pd_spi0>;
679 compatible = "cdns,spi-r1p6";
681 interrupt-parent = <&gic>;
682 interrupts = <0 20 4>;
683 reg = <0x0 0xff050000 0x1000>;
684 clock-names = "ref_clk", "pclk";
685 #address-cells = <1>;
687 power-domains = <&pd_spi1>;
690 ttc0: timer@ff110000 {
691 compatible = "cdns,ttc";
693 interrupt-parent = <&gic>;
694 interrupts = <0 36 4>, <0 37 4>, <0 38 4>;
695 reg = <0x0 0xff110000 0x1000>;
697 power-domains = <&pd_ttc0>;
700 ttc1: timer@ff120000 {
701 compatible = "cdns,ttc";
703 interrupt-parent = <&gic>;
704 interrupts = <0 39 4>, <0 40 4>, <0 41 4>;
705 reg = <0x0 0xff120000 0x1000>;
707 power-domains = <&pd_ttc1>;
710 ttc2: timer@ff130000 {
711 compatible = "cdns,ttc";
713 interrupt-parent = <&gic>;
714 interrupts = <0 42 4>, <0 43 4>, <0 44 4>;
715 reg = <0x0 0xff130000 0x1000>;
717 power-domains = <&pd_ttc2>;
720 ttc3: timer@ff140000 {
721 compatible = "cdns,ttc";
723 interrupt-parent = <&gic>;
724 interrupts = <0 45 4>, <0 46 4>, <0 47 4>;
725 reg = <0x0 0xff140000 0x1000>;
727 power-domains = <&pd_ttc3>;
730 uart0: serial@ff000000 {
731 compatible = "cdns,uart-r1p12";
733 interrupt-parent = <&gic>;
734 interrupts = <0 21 4>;
735 reg = <0x0 0xff000000 0x1000>;
736 clock-names = "uart_clk", "pclk";
737 power-domains = <&pd_uart0>;
740 uart1: serial@ff010000 {
741 compatible = "cdns,uart-r1p12";
743 interrupt-parent = <&gic>;
744 interrupts = <0 22 4>;
745 reg = <0x0 0xff010000 0x1000>;
746 clock-names = "uart_clk", "pclk";
747 power-domains = <&pd_uart1>;
751 compatible = "snps,dwc3";
753 interrupt-parent = <&gic>;
754 interrupts = <0 65 4>;
755 reg = <0x0 0xfe200000 0x40000>;
756 clock-names = "clk_xin", "clk_ahb";
757 power-domains = <&pd_usb0>;
761 compatible = "snps,dwc3";
763 interrupt-parent = <&gic>;
764 interrupts = <0 70 4>;
765 reg = <0x0 0xfe300000 0x40000>;
766 clock-names = "clk_xin", "clk_ahb";
767 power-domains = <&pd_usb1>;
770 watchdog0: watchdog@fd4d0000 {
771 compatible = "cdns,wdt-r1p2";
773 interrupt-parent = <&gic>;
774 interrupts = <0 113 1>;
775 reg = <0x0 0xfd4d0000 0x1000>;
779 xilinx_drm: xilinx_drm {
780 compatible = "xlnx,drm";
782 xlnx,encoder-slave = <&xlnx_dp>;
783 xlnx,connector-type = "DisplayPort";
784 xlnx,dp-sub = <&xlnx_dp_sub>;
786 xlnx,pixel-format = "rgb565";
788 dmas = <&xlnx_dpdma 3>;
792 dmas = <&xlnx_dpdma 0>;
798 xlnx_dp: dp@43c00000 {
799 compatible = "xlnx,v-dp";
801 reg = <0x0 0xfd4a0000 0x1000>;
802 interrupts = <0 119 4>;
803 interrupt-parent = <&gic>;
804 clock-names = "aclk", "aud_clk";
805 xlnx,dp-version = "v1.2";
806 xlnx,max-lanes = <2>;
807 xlnx,max-link-rate = <540000>;
810 xlnx,colormetry = "rgb";
812 xlnx,audio-chan = <2>;
813 xlnx,dp-sub = <&xlnx_dp_sub>;
816 xlnx_dp_snd_card: dp_snd_card {
817 compatible = "xlnx,dp-snd-card";
819 xlnx,dp-snd-pcm = <&xlnx_dp_snd_pcm0>, <&xlnx_dp_snd_pcm1>;
820 xlnx,dp-snd-codec = <&xlnx_dp_snd_codec0>;
823 xlnx_dp_snd_codec0: dp_snd_codec0 {
824 compatible = "xlnx,dp-snd-codec";
826 clock-names = "aud_clk";
829 xlnx_dp_snd_pcm0: dp_snd_pcm0 {
830 compatible = "xlnx,dp-snd-pcm";
832 dmas = <&xlnx_dpdma 4>;
836 xlnx_dp_snd_pcm1: dp_snd_pcm1 {
837 compatible = "xlnx,dp-snd-pcm";
839 dmas = <&xlnx_dpdma 5>;
843 xlnx_dp_sub: dp_sub@43c0a000 {
844 compatible = "xlnx,dp-sub";
846 reg = <0x0 0xfd4aa000 0x1000>, <0x0 0xfd4ab000 0x1000>, <0x0 0xfd4ac000 0x1000>;
847 reg-names = "blend", "av_buf", "aud";
848 xlnx,output-fmt = "rgb";
851 xlnx_dpdma: dma@fd4c0000 {
852 compatible = "xlnx,dpdma";
854 reg = <0x0 0xfd4c0000 0x1000>;
855 interrupts = <0 122 4>;
856 interrupt-parent = <&gic>;
857 clock-names = "axi_clk";
860 dma-video0channel@43c10000 {
861 compatible = "xlnx,video0";
863 dma-video1channel@43c10000 {
864 compatible = "xlnx,video1";
866 dma-video2channel@43c10000 {
867 compatible = "xlnx,video2";
869 dma-graphicschannel@43c10000 {
870 compatible = "xlnx,graphics";
872 dma-audio0channel@43c10000 {
873 compatible = "xlnx,audio0";
875 dma-audio1channel@43c10000 {
876 compatible = "xlnx,audio1";