1 // SPDX-License-Identifier: GPL-2.0+
3 * dts file for Xilinx ZynqMP
5 * (C) Copyright 2014 - 2015, Xilinx, Inc.
7 * Michal Simek <michal.simek@xilinx.com>
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of
12 * the License, or (at your option) any later version.
16 compatible = "xlnx,zynqmp";
25 compatible = "arm,cortex-a53", "arm,armv8";
27 enable-method = "psci";
28 operating-points-v2 = <&cpu_opp_table>;
30 cpu-idle-states = <&CPU_SLEEP_0>;
34 compatible = "arm,cortex-a53", "arm,armv8";
36 enable-method = "psci";
38 operating-points-v2 = <&cpu_opp_table>;
39 cpu-idle-states = <&CPU_SLEEP_0>;
43 compatible = "arm,cortex-a53", "arm,armv8";
45 enable-method = "psci";
47 operating-points-v2 = <&cpu_opp_table>;
48 cpu-idle-states = <&CPU_SLEEP_0>;
52 compatible = "arm,cortex-a53", "arm,armv8";
54 enable-method = "psci";
56 operating-points-v2 = <&cpu_opp_table>;
57 cpu-idle-states = <&CPU_SLEEP_0>;
61 entry-method = "psci";
63 CPU_SLEEP_0: cpu-sleep-0 {
64 compatible = "arm,idle-state";
65 arm,psci-suspend-param = <0x40000000>;
67 entry-latency-us = <300>;
68 exit-latency-us = <600>;
69 min-residency-us = <10000>;
74 cpu_opp_table: cpu_opp_table {
75 compatible = "operating-points-v2";
78 opp-hz = /bits/ 64 <1199999988>;
79 opp-microvolt = <1000000>;
80 clock-latency-ns = <500000>;
83 opp-hz = /bits/ 64 <599999994>;
84 opp-microvolt = <1000000>;
85 clock-latency-ns = <500000>;
88 opp-hz = /bits/ 64 <399999996>;
89 opp-microvolt = <1000000>;
90 clock-latency-ns = <500000>;
93 opp-hz = /bits/ 64 <299999997>;
94 opp-microvolt = <1000000>;
95 clock-latency-ns = <500000>;
101 compatible = "xlnx,zynqmp-ipi-mailbox";
102 interrupt-parent = <&gic>;
103 interrupts = <0 35 4>;
105 #address-cells = <2>;
109 ipi_mailbox_pmu1: mailbox@ff990400 {
111 reg = <0x0 0xff9905c0 0x0 0x20>,
112 <0x0 0xff9905e0 0x0 0x20>,
113 <0x0 0xff990e80 0x0 0x20>,
114 <0x0 0xff990ea0 0x0 0x20>;
115 reg-names = "local_request_region" , "local_response_region",
116 "remote_request_region", "remote_response_region";
123 compatible = "arm,dcc";
129 compatible = "arm,armv8-pmuv3";
130 interrupt-parent = <&gic>;
131 interrupts = <0 143 4>,
138 compatible = "arm,psci-0.2";
144 compatible = "xlnx,zynqmp-firmware";
146 #power-domain-cells = <0x1>;
149 zynqmp_power: zynqmp-power {
151 compatible = "xlnx,zynqmp-power";
152 interrupt-parent = <&gic>;
153 interrupts = <0 35 4>;
154 mboxes = <&ipi_mailbox_pmu1 0>, <&ipi_mailbox_pmu1 1>;
155 mbox-names = "tx", "rx";
161 compatible = "arm,armv8-timer";
162 interrupt-parent = <&gic>;
163 interrupts = <1 13 0xf08>,
170 compatible = "arm,cortex-a53-edac";
173 fpga_full: fpga-full {
174 compatible = "fpga-region";
176 #address-cells = <2>;
181 compatible = "xlnx,zynqmp-nvmem-fw";
182 #address-cells = <1>;
185 soc_revision: soc_revision@0 {
191 compatible = "xlnx,zynqmp-pcap-fpga";
194 rst: reset-controller {
195 compatible = "xlnx,zynqmp-reset";
199 xlnx_dp_snd_card: dp_snd_card {
200 compatible = "xlnx,dp-snd-card";
202 xlnx,dp-snd-pcm = <&xlnx_dp_snd_pcm0>, <&xlnx_dp_snd_pcm1>;
203 xlnx,dp-snd-codec = <&xlnx_dp_snd_codec0>;
206 xlnx_dp_snd_codec0: dp_snd_codec0 {
207 compatible = "xlnx,dp-snd-codec";
209 clock-names = "aud_clk";
212 xlnx_dp_snd_pcm0: dp_snd_pcm0 {
213 compatible = "xlnx,dp-snd-pcm";
215 dmas = <&xlnx_dpdma 4>;
219 xlnx_dp_snd_pcm1: dp_snd_pcm1 {
220 compatible = "xlnx,dp-snd-pcm";
222 dmas = <&xlnx_dpdma 5>;
226 xilinx_drm: xilinx_drm {
227 compatible = "xlnx,drm";
229 xlnx,encoder-slave = <&xlnx_dp>;
230 xlnx,connector-type = "DisplayPort";
231 xlnx,dp-sub = <&xlnx_dp_sub>;
233 xlnx,pixel-format = "rgb565";
235 dmas = <&xlnx_dpdma 3>;
239 dmas = <&xlnx_dpdma 0>,
242 dma-names = "dma0", "dma1", "dma2";
247 amba_apu: amba_apu@0 {
248 compatible = "simple-bus";
249 #address-cells = <2>;
251 ranges = <0 0 0 0 0xffffffff>;
253 gic: interrupt-controller@f9010000 {
254 compatible = "arm,gic-400", "arm,cortex-a15-gic";
255 #interrupt-cells = <3>;
256 reg = <0x0 0xf9010000 0x10000>,
257 <0x0 0xf9020000 0x20000>,
258 <0x0 0xf9040000 0x20000>,
259 <0x0 0xf9060000 0x20000>;
260 interrupt-controller;
261 interrupt-parent = <&gic>;
262 interrupts = <1 9 0xf04>;
267 compatible = "simple-bus";
269 #address-cells = <2>;
274 compatible = "xlnx,zynq-can-1.0";
276 clock-names = "can_clk", "pclk";
277 reg = <0x0 0xff060000 0x0 0x1000>;
278 interrupts = <0 23 4>;
279 interrupt-parent = <&gic>;
280 tx-fifo-depth = <0x40>;
281 rx-fifo-depth = <0x40>;
285 compatible = "xlnx,zynq-can-1.0";
287 clock-names = "can_clk", "pclk";
288 reg = <0x0 0xff070000 0x0 0x1000>;
289 interrupts = <0 24 4>;
290 interrupt-parent = <&gic>;
291 tx-fifo-depth = <0x40>;
292 rx-fifo-depth = <0x40>;
296 compatible = "arm,cci-400";
297 reg = <0x0 0xfd6e0000 0x0 0x9000>;
298 ranges = <0x0 0x0 0xfd6e0000 0x10000>;
299 #address-cells = <1>;
303 compatible = "arm,cci-400-pmu,r1";
304 reg = <0x9000 0x5000>;
305 interrupt-parent = <&gic>;
306 interrupts = <0 123 4>,
315 fpd_dma_chan1: dma@fd500000 {
317 compatible = "xlnx,zynqmp-dma-1.0";
318 reg = <0x0 0xfd500000 0x0 0x1000>;
319 interrupt-parent = <&gic>;
320 interrupts = <0 124 4>;
321 clock-names = "clk_main", "clk_apb";
322 xlnx,bus-width = <128>;
323 #stream-id-cells = <1>;
324 iommus = <&smmu 0x14e8>;
327 fpd_dma_chan2: dma@fd510000 {
329 compatible = "xlnx,zynqmp-dma-1.0";
330 reg = <0x0 0xfd510000 0x0 0x1000>;
331 interrupt-parent = <&gic>;
332 interrupts = <0 125 4>;
333 clock-names = "clk_main", "clk_apb";
334 xlnx,bus-width = <128>;
335 #stream-id-cells = <1>;
336 iommus = <&smmu 0x14e9>;
339 fpd_dma_chan3: dma@fd520000 {
341 compatible = "xlnx,zynqmp-dma-1.0";
342 reg = <0x0 0xfd520000 0x0 0x1000>;
343 interrupt-parent = <&gic>;
344 interrupts = <0 126 4>;
345 clock-names = "clk_main", "clk_apb";
346 xlnx,bus-width = <128>;
347 #stream-id-cells = <1>;
348 iommus = <&smmu 0x14ea>;
351 fpd_dma_chan4: dma@fd530000 {
353 compatible = "xlnx,zynqmp-dma-1.0";
354 reg = <0x0 0xfd530000 0x0 0x1000>;
355 interrupt-parent = <&gic>;
356 interrupts = <0 127 4>;
357 clock-names = "clk_main", "clk_apb";
358 xlnx,bus-width = <128>;
359 #stream-id-cells = <1>;
360 iommus = <&smmu 0x14eb>;
363 fpd_dma_chan5: dma@fd540000 {
365 compatible = "xlnx,zynqmp-dma-1.0";
366 reg = <0x0 0xfd540000 0x0 0x1000>;
367 interrupt-parent = <&gic>;
368 interrupts = <0 128 4>;
369 clock-names = "clk_main", "clk_apb";
370 xlnx,bus-width = <128>;
371 #stream-id-cells = <1>;
372 iommus = <&smmu 0x14ec>;
375 fpd_dma_chan6: dma@fd550000 {
377 compatible = "xlnx,zynqmp-dma-1.0";
378 reg = <0x0 0xfd550000 0x0 0x1000>;
379 interrupt-parent = <&gic>;
380 interrupts = <0 129 4>;
381 clock-names = "clk_main", "clk_apb";
382 xlnx,bus-width = <128>;
383 #stream-id-cells = <1>;
384 iommus = <&smmu 0x14ed>;
387 fpd_dma_chan7: dma@fd560000 {
389 compatible = "xlnx,zynqmp-dma-1.0";
390 reg = <0x0 0xfd560000 0x0 0x1000>;
391 interrupt-parent = <&gic>;
392 interrupts = <0 130 4>;
393 clock-names = "clk_main", "clk_apb";
394 xlnx,bus-width = <128>;
395 #stream-id-cells = <1>;
396 iommus = <&smmu 0x14ee>;
399 fpd_dma_chan8: dma@fd570000 {
401 compatible = "xlnx,zynqmp-dma-1.0";
402 reg = <0x0 0xfd570000 0x0 0x1000>;
403 interrupt-parent = <&gic>;
404 interrupts = <0 131 4>;
405 clock-names = "clk_main", "clk_apb";
406 xlnx,bus-width = <128>;
407 #stream-id-cells = <1>;
408 iommus = <&smmu 0x14ef>;
413 compatible = "arm,mali-400", "arm,mali-utgard";
414 reg = <0x0 0xfd4b0000 0x0 0x10000>;
415 interrupt-parent = <&gic>;
416 interrupts = <0 132 4>, <0 132 4>, <0 132 4>, <0 132 4>, <0 132 4>, <0 132 4>;
417 interrupt-names = "IRQGP", "IRQGPMMU", "IRQPP0", "IRQPPMMU0", "IRQPP1", "IRQPPMMU1";
418 clock-names = "gpu", "gpu_pp0", "gpu_pp1";
421 /* LPDDMA default allows only secured access. inorder to enable
422 * These dma channels, Users should ensure that these dma
423 * Channels are allowed for non secure access.
425 lpd_dma_chan1: dma@ffa80000 {
427 compatible = "xlnx,zynqmp-dma-1.0";
428 reg = <0x0 0xffa80000 0x0 0x1000>;
429 interrupt-parent = <&gic>;
430 interrupts = <0 77 4>;
431 clock-names = "clk_main", "clk_apb";
432 xlnx,bus-width = <64>;
433 #stream-id-cells = <1>;
434 iommus = <&smmu 0x868>;
437 lpd_dma_chan2: dma@ffa90000 {
439 compatible = "xlnx,zynqmp-dma-1.0";
440 reg = <0x0 0xffa90000 0x0 0x1000>;
441 interrupt-parent = <&gic>;
442 interrupts = <0 78 4>;
443 clock-names = "clk_main", "clk_apb";
444 xlnx,bus-width = <64>;
445 #stream-id-cells = <1>;
446 iommus = <&smmu 0x869>;
449 lpd_dma_chan3: dma@ffaa0000 {
451 compatible = "xlnx,zynqmp-dma-1.0";
452 reg = <0x0 0xffaa0000 0x0 0x1000>;
453 interrupt-parent = <&gic>;
454 interrupts = <0 79 4>;
455 clock-names = "clk_main", "clk_apb";
456 xlnx,bus-width = <64>;
457 #stream-id-cells = <1>;
458 iommus = <&smmu 0x86a>;
461 lpd_dma_chan4: dma@ffab0000 {
463 compatible = "xlnx,zynqmp-dma-1.0";
464 reg = <0x0 0xffab0000 0x0 0x1000>;
465 interrupt-parent = <&gic>;
466 interrupts = <0 80 4>;
467 clock-names = "clk_main", "clk_apb";
468 xlnx,bus-width = <64>;
469 #stream-id-cells = <1>;
470 iommus = <&smmu 0x86b>;
473 lpd_dma_chan5: dma@ffac0000 {
475 compatible = "xlnx,zynqmp-dma-1.0";
476 reg = <0x0 0xffac0000 0x0 0x1000>;
477 interrupt-parent = <&gic>;
478 interrupts = <0 81 4>;
479 clock-names = "clk_main", "clk_apb";
480 xlnx,bus-width = <64>;
481 #stream-id-cells = <1>;
482 iommus = <&smmu 0x86c>;
485 lpd_dma_chan6: dma@ffad0000 {
487 compatible = "xlnx,zynqmp-dma-1.0";
488 reg = <0x0 0xffad0000 0x0 0x1000>;
489 interrupt-parent = <&gic>;
490 interrupts = <0 82 4>;
491 clock-names = "clk_main", "clk_apb";
492 xlnx,bus-width = <64>;
493 #stream-id-cells = <1>;
494 iommus = <&smmu 0x86d>;
497 lpd_dma_chan7: dma@ffae0000 {
499 compatible = "xlnx,zynqmp-dma-1.0";
500 reg = <0x0 0xffae0000 0x0 0x1000>;
501 interrupt-parent = <&gic>;
502 interrupts = <0 83 4>;
503 clock-names = "clk_main", "clk_apb";
504 xlnx,bus-width = <64>;
505 #stream-id-cells = <1>;
506 iommus = <&smmu 0x86e>;
509 lpd_dma_chan8: dma@ffaf0000 {
511 compatible = "xlnx,zynqmp-dma-1.0";
512 reg = <0x0 0xffaf0000 0x0 0x1000>;
513 interrupt-parent = <&gic>;
514 interrupts = <0 84 4>;
515 clock-names = "clk_main", "clk_apb";
516 xlnx,bus-width = <64>;
517 #stream-id-cells = <1>;
518 iommus = <&smmu 0x86f>;
521 mc: memory-controller@fd070000 {
522 compatible = "xlnx,zynqmp-ddrc-2.40a";
523 reg = <0x0 0xfd070000 0x0 0x30000>;
524 interrupt-parent = <&gic>;
525 interrupts = <0 112 4>;
528 nand0: nand@ff100000 {
529 compatible = "arasan,nfc-v3p10";
531 reg = <0x0 0xff100000 0x0 0x1000>;
532 clock-names = "clk_sys", "clk_flash";
533 interrupt-parent = <&gic>;
534 interrupts = <0 14 4>;
535 #address-cells = <2>;
537 #stream-id-cells = <1>;
538 iommus = <&smmu 0x872>;
541 gem0: ethernet@ff0b0000 {
542 compatible = "cdns,zynqmp-gem";
544 interrupt-parent = <&gic>;
545 interrupts = <0 57 4>, <0 57 4>;
546 reg = <0x0 0xff0b0000 0x0 0x1000>;
547 clock-names = "pclk", "hclk", "tx_clk";
548 #address-cells = <1>;
550 #stream-id-cells = <1>;
551 iommus = <&smmu 0x874>;
554 gem1: ethernet@ff0c0000 {
555 compatible = "cdns,zynqmp-gem";
557 interrupt-parent = <&gic>;
558 interrupts = <0 59 4>, <0 59 4>;
559 reg = <0x0 0xff0c0000 0x0 0x1000>;
560 clock-names = "pclk", "hclk", "tx_clk";
561 #address-cells = <1>;
563 #stream-id-cells = <1>;
564 iommus = <&smmu 0x875>;
567 gem2: ethernet@ff0d0000 {
568 compatible = "cdns,zynqmp-gem";
570 interrupt-parent = <&gic>;
571 interrupts = <0 61 4>, <0 61 4>;
572 reg = <0x0 0xff0d0000 0x0 0x1000>;
573 clock-names = "pclk", "hclk", "tx_clk";
574 #address-cells = <1>;
576 #stream-id-cells = <1>;
577 iommus = <&smmu 0x876>;
580 gem3: ethernet@ff0e0000 {
581 compatible = "cdns,zynqmp-gem";
583 interrupt-parent = <&gic>;
584 interrupts = <0 63 4>, <0 63 4>;
585 reg = <0x0 0xff0e0000 0x0 0x1000>;
586 clock-names = "pclk", "hclk", "tx_clk";
587 #address-cells = <1>;
589 #stream-id-cells = <1>;
590 iommus = <&smmu 0x877>;
593 gpio: gpio@ff0a0000 {
594 compatible = "xlnx,zynqmp-gpio-1.0";
597 interrupt-parent = <&gic>;
598 interrupts = <0 16 4>;
599 interrupt-controller;
600 #interrupt-cells = <2>;
601 reg = <0x0 0xff0a0000 0x0 0x1000>;
606 compatible = "cdns,i2c-r1p14", "cdns,i2c-r1p10";
608 interrupt-parent = <&gic>;
609 interrupts = <0 17 4>;
610 reg = <0x0 0xff020000 0x0 0x1000>;
611 #address-cells = <1>;
616 compatible = "cdns,i2c-r1p14", "cdns,i2c-r1p10";
618 interrupt-parent = <&gic>;
619 interrupts = <0 18 4>;
620 reg = <0x0 0xff030000 0x0 0x1000>;
621 #address-cells = <1>;
625 ocm: memory-controller@ff960000 {
626 compatible = "xlnx,zynqmp-ocmc-1.0";
627 reg = <0x0 0xff960000 0x0 0x1000>;
628 interrupt-parent = <&gic>;
629 interrupts = <0 10 4>;
632 pcie: pcie@fd0e0000 {
633 compatible = "xlnx,nwl-pcie-2.11";
635 #address-cells = <3>;
637 #interrupt-cells = <1>;
640 interrupt-parent = <&gic>;
641 interrupts = <0 118 4>,
644 <0 115 4>, /* MSI_1 [63...32] */
645 <0 114 4>; /* MSI_0 [31...0] */
646 interrupt-names = "misc", "dummy", "intx",
648 msi-parent = <&pcie>;
649 reg = <0x0 0xfd0e0000 0x0 0x1000>,
650 <0x0 0xfd480000 0x0 0x1000>,
651 <0x80 0x00000000 0x0 0x1000000>;
652 reg-names = "breg", "pcireg", "cfg";
653 ranges = <0x02000000 0x00000000 0xe0000000 0x00000000 0xe0000000 0x00000000 0x10000000 /* non-prefetchable memory */
654 0x43000000 0x00000006 0x00000000 0x00000006 0x00000000 0x00000002 0x00000000>;/* prefetchable memory */
655 bus-range = <0x00 0xff>;
656 interrupt-map-mask = <0x0 0x0 0x0 0x7>;
657 interrupt-map = <0x0 0x0 0x0 0x1 &pcie_intc 0x1>,
658 <0x0 0x0 0x0 0x2 &pcie_intc 0x2>,
659 <0x0 0x0 0x0 0x3 &pcie_intc 0x3>,
660 <0x0 0x0 0x0 0x4 &pcie_intc 0x4>;
661 pcie_intc: legacy-interrupt-controller {
662 interrupt-controller;
663 #address-cells = <0>;
664 #interrupt-cells = <1>;
670 compatible = "xlnx,zynqmp-qspi-1.0";
672 clock-names = "ref_clk", "pclk";
673 interrupts = <0 15 4>;
674 interrupt-parent = <&gic>;
676 reg = <0x0 0xff0f0000 0x0 0x1000>,
677 <0x0 0xc0000000 0x0 0x8000000>;
678 #address-cells = <1>;
680 #stream-id-cells = <1>;
681 iommus = <&smmu 0x873>;
685 compatible = "xlnx,zynqmp-rtc";
687 reg = <0x0 0xffa60000 0x0 0x100>;
688 interrupt-parent = <&gic>;
689 interrupts = <0 26 4>, <0 27 4>;
690 interrupt-names = "alarm", "sec";
691 calibration = <0x8000>;
694 serdes: zynqmp_phy@fd400000 {
695 compatible = "xlnx,zynqmp-psgtr";
697 reg = <0x0 0xfd400000 0x0 0x40000>,
698 <0x0 0xfd3d0000 0x0 0x1000>,
699 <0x0 0xff5e0000 0x0 0x1000>;
700 reg-names = "serdes", "siou", "lpd";
701 nvmem-cells = <&soc_revision>;
702 nvmem-cell-names = "soc_revision";
703 resets = <&rst 16>, <&rst 59>, <&rst 60>,
704 <&rst 61>, <&rst 62>, <&rst 63>,
705 <&rst 64>, <&rst 3>, <&rst 29>,
706 <&rst 30>, <&rst 31>, <&rst 32>;
707 reset-names = "sata_rst", "usb0_crst", "usb1_crst",
708 "usb0_hibrst", "usb1_hibrst", "usb0_apbrst",
709 "usb1_apbrst", "dp_rst", "gem0_rst",
710 "gem1_rst", "gem2_rst", "gem3_rst";
725 sata: ahci@fd0c0000 {
726 compatible = "ceva,ahci-1v84";
728 reg = <0x0 0xfd0c0000 0x0 0x2000>;
729 interrupt-parent = <&gic>;
730 interrupts = <0 133 4>;
731 #stream-id-cells = <4>;
732 iommus = <&smmu 0x4c0>, <&smmu 0x4c1>,
733 <&smmu 0x4c2>, <&smmu 0x4c3>;
737 sdhci0: mmc@ff160000 {
739 compatible = "xlnx,zynqmp-8.9a", "arasan,sdhci-8.9a";
741 interrupt-parent = <&gic>;
742 interrupts = <0 48 4>;
743 reg = <0x0 0xff160000 0x0 0x1000>;
744 clock-names = "clk_xin", "clk_ahb";
745 xlnx,device_id = <0>;
746 #stream-id-cells = <1>;
747 iommus = <&smmu 0x870>;
748 nvmem-cells = <&soc_revision>;
749 nvmem-cell-names = "soc_revision";
752 sdhci1: mmc@ff170000 {
754 compatible = "xlnx,zynqmp-8.9a", "arasan,sdhci-8.9a";
756 interrupt-parent = <&gic>;
757 interrupts = <0 49 4>;
758 reg = <0x0 0xff170000 0x0 0x1000>;
759 clock-names = "clk_xin", "clk_ahb";
760 xlnx,device_id = <1>;
761 #stream-id-cells = <1>;
762 iommus = <&smmu 0x871>;
763 nvmem-cells = <&soc_revision>;
764 nvmem-cell-names = "soc_revision";
767 pinctrl0: pinctrl@ff180000 {
768 compatible = "xlnx,pinctrl-zynqmp";
770 reg = <0x0 0xff180000 0x0 0x1000>;
773 smmu: smmu@fd800000 {
774 compatible = "arm,mmu-500";
775 reg = <0x0 0xfd800000 0x0 0x20000>;
778 #global-interrupts = <1>;
779 interrupt-parent = <&gic>;
780 interrupts = <0 155 4>,
781 <0 155 4>, <0 155 4>, <0 155 4>, <0 155 4>,
782 <0 155 4>, <0 155 4>, <0 155 4>, <0 155 4>,
783 <0 155 4>, <0 155 4>, <0 155 4>, <0 155 4>,
784 <0 155 4>, <0 155 4>, <0 155 4>, <0 155 4>;
788 compatible = "cdns,spi-r1p6";
790 interrupt-parent = <&gic>;
791 interrupts = <0 19 4>;
792 reg = <0x0 0xff040000 0x0 0x1000>;
793 clock-names = "ref_clk", "pclk";
794 #address-cells = <1>;
799 compatible = "cdns,spi-r1p6";
801 interrupt-parent = <&gic>;
802 interrupts = <0 20 4>;
803 reg = <0x0 0xff050000 0x0 0x1000>;
804 clock-names = "ref_clk", "pclk";
805 #address-cells = <1>;
809 ttc0: timer@ff110000 {
810 compatible = "cdns,ttc";
812 interrupt-parent = <&gic>;
813 interrupts = <0 36 4>, <0 37 4>, <0 38 4>;
814 reg = <0x0 0xff110000 0x0 0x1000>;
818 ttc1: timer@ff120000 {
819 compatible = "cdns,ttc";
821 interrupt-parent = <&gic>;
822 interrupts = <0 39 4>, <0 40 4>, <0 41 4>;
823 reg = <0x0 0xff120000 0x0 0x1000>;
827 ttc2: timer@ff130000 {
828 compatible = "cdns,ttc";
830 interrupt-parent = <&gic>;
831 interrupts = <0 42 4>, <0 43 4>, <0 44 4>;
832 reg = <0x0 0xff130000 0x0 0x1000>;
836 ttc3: timer@ff140000 {
837 compatible = "cdns,ttc";
839 interrupt-parent = <&gic>;
840 interrupts = <0 45 4>, <0 46 4>, <0 47 4>;
841 reg = <0x0 0xff140000 0x0 0x1000>;
845 uart0: serial@ff000000 {
847 compatible = "cdns,uart-r1p12", "xlnx,xuartps";
849 interrupt-parent = <&gic>;
850 interrupts = <0 21 4>;
851 reg = <0x0 0xff000000 0x0 0x1000>;
852 clock-names = "uart_clk", "pclk";
855 uart1: serial@ff010000 {
857 compatible = "cdns,uart-r1p12", "xlnx,xuartps";
859 interrupt-parent = <&gic>;
860 interrupts = <0 22 4>;
861 reg = <0x0 0xff010000 0x0 0x1000>;
862 clock-names = "uart_clk", "pclk";
865 usb0: usb0@ff9d0000 {
866 #address-cells = <2>;
869 compatible = "xlnx,zynqmp-dwc3";
870 reg = <0x0 0xff9d0000 0x0 0x100>;
871 clock-names = "bus_clk", "ref_clk";
873 nvmem-cells = <&soc_revision>;
874 nvmem-cell-names = "soc_revision";
876 dwc3_0: dwc3@fe200000 {
877 compatible = "snps,dwc3";
879 reg = <0x0 0xfe200000 0x0 0x40000>;
880 interrupt-parent = <&gic>;
881 interrupts = <0 65 4>, <0 69 4>;
882 #stream-id-cells = <1>;
883 iommus = <&smmu 0x860>;
884 snps,quirk-frame-length-adjustment = <0x20>;
890 usb1: usb1@ff9e0000 {
891 #address-cells = <2>;
894 compatible = "xlnx,zynqmp-dwc3";
895 reg = <0x0 0xff9e0000 0x0 0x100>;
896 clock-names = "bus_clk", "ref_clk";
898 nvmem-cells = <&soc_revision>;
899 nvmem-cell-names = "soc_revision";
901 dwc3_1: dwc3@fe300000 {
902 compatible = "snps,dwc3";
904 reg = <0x0 0xfe300000 0x0 0x40000>;
905 interrupt-parent = <&gic>;
906 interrupts = <0 70 4>, <0 74 4>;
907 #stream-id-cells = <1>;
908 iommus = <&smmu 0x861>;
909 snps,quirk-frame-length-adjustment = <0x20>;
915 watchdog0: watchdog@fd4d0000 {
916 compatible = "cdns,wdt-r1p2";
918 interrupt-parent = <&gic>;
919 interrupts = <0 113 1>;
920 reg = <0x0 0xfd4d0000 0x0 0x1000>;
925 xilinx_ams: ams@ffa50000 {
926 compatible = "xlnx,zynqmp-ams";
928 interrupt-parent = <&gic>;
929 interrupts = <0 56 4>;
930 interrupt-names = "ams-irq";
931 reg = <0x0 0xffa50000 0x0 0x800>;
932 reg-names = "ams-base";
933 #address-cells = <2>;
935 #io-channel-cells = <1>;
938 ams_ps: ams_ps@ffa50800 {
939 compatible = "xlnx,zynqmp-ams-ps";
941 reg = <0x0 0xffa50800 0x0 0x400>;
944 ams_pl: ams_pl@ffa50c00 {
945 compatible = "xlnx,zynqmp-ams-pl";
947 reg = <0x0 0xffa50c00 0x0 0x400>;
951 xlnx_dp: dp@fd4a0000 {
952 compatible = "xlnx,v-dp";
954 reg = <0x0 0xfd4a0000 0x0 0x1000>;
955 interrupts = <0 119 4>;
956 interrupt-parent = <&gic>;
957 clock-names = "aclk", "aud_clk";
958 xlnx,dp-version = "v1.2";
959 xlnx,max-lanes = <2>;
960 xlnx,max-link-rate = <540000>;
963 xlnx,colormetry = "rgb";
965 xlnx,audio-chan = <2>;
966 xlnx,dp-sub = <&xlnx_dp_sub>;
967 xlnx,max-pclock-frequency = <300000>;
970 xlnx_dp_sub: dp_sub@fd4aa000 {
971 compatible = "xlnx,dp-sub";
973 reg = <0x0 0xfd4aa000 0x0 0x1000>,
974 <0x0 0xfd4ab000 0x0 0x1000>,
975 <0x0 0xfd4ac000 0x0 0x1000>;
976 reg-names = "blend", "av_buf", "aud";
977 xlnx,output-fmt = "rgb";
978 xlnx,vid-fmt = "yuyv";
979 xlnx,gfx-fmt = "rgb565";
982 xlnx_dpdma: dma@fd4c0000 {
983 compatible = "xlnx,dpdma";
985 reg = <0x0 0xfd4c0000 0x0 0x1000>;
986 interrupts = <0 122 4>;
987 interrupt-parent = <&gic>;
988 clock-names = "axi_clk";
992 compatible = "xlnx,video0";
995 compatible = "xlnx,video1";
998 compatible = "xlnx,video2";
1000 dma-graphicschannel {
1001 compatible = "xlnx,graphics";
1004 compatible = "xlnx,audio0";
1007 compatible = "xlnx,audio1";