1 // SPDX-License-Identifier: GPL-2.0
3 * dts file for Xilinx ZynqMP ZCU1285 RevA
5 * (C) Copyright 2018 - 2020, Xilinx, Inc.
7 * Michal Simek <michal.simek@xilinx.com>
8 * Siva Durga Prasad Paladugu <sivadur@xilinx.com>
13 #include "zynqmp.dtsi"
14 #include "zynqmp-clk-ccf.dtsi"
17 model = "ZynqMP ZCU1285 RevA";
18 compatible = "xlnx,zynqmp-zcu1285-revA", "xlnx,zynqmp-zcu1285",
26 i2c = &i2c0; /* EMIO */
30 bootargs = "earlycon";
31 stdout-path = "serial0:115200n8";
35 device_type = "memory";
36 reg = <0x0 0x0 0x0 0x80000000>;
40 compatible = "iio-hwmon";
41 io-channels = <&u60 0>, <&u60 1>, <&u60 2>, <&u60 3>;
44 compatible = "iio-hwmon";
45 io-channels = <&u61 0>, <&u61 1>, <&u61 2>, <&u61 3>;
48 compatible = "iio-hwmon";
49 io-channels = <&u63 0>, <&u63 1>, <&u63 2>, <&u63 3>;
52 compatible = "iio-hwmon";
53 io-channels = <&u65 0>, <&u65 1>, <&u65 2>, <&u65 3>;
56 compatible = "iio-hwmon";
57 io-channels = <&u64 0>, <&u64 1>, <&u64 2>, <&u64 3>;
67 clock-frequency = <400000>;
70 compatible = "nxp,pca9548"; /* u22 */
80 max20751@74 { /* u23 */
81 compatible = "maxim,max20751";
84 max20751@70 { /* u89 */
85 compatible = "maxim,max20751";
88 max15301@a { /* u28 */
89 compatible = "maxim,max15301";
92 max15303@b { /* u48 */
93 compatible = "maxim,max15303";
96 max15303@d { /* u27 */
97 compatible = "maxim,max15303";
100 max15303@e { /* u11 */
101 compatible = "maxim,max15303";
104 max15303@f { /* u96 */
105 compatible = "maxim,max15303";
108 max15303@11 { /* u47 */
109 compatible = "maxim,max15303";
112 max15303@12 { /* u24 */
113 compatible = "maxim,max15303";
116 max15301@13 { /* u29 */
117 compatible = "maxim,max15301";
120 max15303@14 { /* u51 */
121 compatible = "maxim,max15303";
124 max15303@15 { /* u30 */
125 compatible = "maxim,max15303";
128 max15303@16 { /* u102 */
129 compatible = "maxim,max15303";
132 max15301@17 { /* u50 */
133 compatible = "maxim,max15301";
136 max15301@18 { /* u31 */
137 compatible = "maxim,max15301";
142 #address-cells = <1>;
148 #address-cells = <1>;
152 eeprom: eeprom@54 { /* u101 */
153 compatible = "atmel,24c32"; /* 24LC32A */
158 #address-cells = <1>;
164 #address-cells = <1>;
170 #address-cells = <1>;
174 u60: ina226@40 { /* u60 */
175 compatible = "ti,ina226";
176 #io-channel-cells = <1>;
177 label = "ina226-u60";
179 shunt-resistor = <1000>;
181 u61: ina226@41 { /* u61 */
182 compatible = "ti,ina226";
183 #io-channel-cells = <1>;
184 label = "ina226-u61";
186 shunt-resistor = <1000>;
188 u63: ina226@42 { /* u63 */
189 compatible = "ti,ina226";
190 #io-channel-cells = <1>;
191 label = "ina226-u63";
193 shunt-resistor = <1000>;
195 u65: ina226@43 { /* u65 */
196 compatible = "ti,ina226";
197 #io-channel-cells = <1>;
198 label = "ina226-u65";
200 shunt-resistor = <1000>;
202 u64: ina226@44 { /* u64 */
203 compatible = "ti,ina226";
204 #io-channel-cells = <1>;
205 label = "ina226-u64";
207 shunt-resistor = <1000>;
211 #address-cells = <1>;
217 #address-cells = <1>;
228 compatible = "m25p80", "jedec,spi-nor"; /* 32MB */
229 #address-cells = <1>;
232 spi-tx-bus-width = <1>;
233 spi-rx-bus-width = <1>;
234 spi-max-frequency = <108000000>; /* Based on DC1 spec */
245 * This property should be removed for supporting UHS mode