1 // SPDX-License-Identifier: GPL-2.0+
3 * dts file for Xilinx ZynqMP ZCU111
5 * (C) Copyright 2017 - 2018, Xilinx, Inc.
7 * Michal Simek <michal.simek@xilinx.com>
12 #include "zynqmp.dtsi"
13 #include "zynqmp-clk-ccf.dtsi"
14 #include <dt-bindings/input/input.h>
15 #include <dt-bindings/gpio/gpio.h>
16 #include <dt-bindings/phy/phy.h>
19 model = "ZynqMP ZCU111 RevA";
20 compatible = "xlnx,zynqmp-zcu111-revA", "xlnx,zynqmp-zcu111", "xlnx,zynqmp";
36 bootargs = "earlycon";
37 stdout-path = "serial0:115200n8";
38 xlnx,eeprom = &eeprom;
42 device_type = "memory";
43 reg = <0x0 0x0 0x0 0x80000000>, <0x8 0x00000000 0x0 0x80000000>;
44 /* Another 4GB connected to PL */
48 compatible = "gpio-keys";
52 gpios = <&gpio 22 GPIO_ACTIVE_HIGH>;
53 linux,code = <KEY_DOWN>;
60 compatible = "gpio-leds";
63 gpios = <&gpio 23 GPIO_ACTIVE_HIGH>;
64 linux,default-trigger = "heartbeat";
107 phy-handle = <&phy0>;
108 phy-mode = "rgmii-id";
111 ti,rx-internal-delay = <0x8>;
112 ti,tx-internal-delay = <0xa>;
113 ti,fifo-depth = <0x1>;
127 clock-frequency = <400000>;
129 tca6416_u22: gpio@20 {
130 compatible = "ti,tca6416";
132 gpio-controller; /* interrupt not connected */
138 * 1 - MAX6643_FANFAIL_B
139 * 2 - MIO26_PMU_INPUT_LS
140 * 4 - SFP_SI5382_INT_ALM
141 * 5 - IIC_MUX_RESET_B
142 * 6 - GEM3_EXP_RESET_B
143 * 10 - FMCP_HSPC_PRSNT_M2C_B
144 * 11 - CLK_SPI_MUX_SEL0
145 * 12 - CLK_SPI_MUX_SEL1
146 * 16 - IRPS5401_ALERT_B
147 * 17 - INA226_PMBUS_ALERT
148 * 3, 7, 13-15 - not connected
152 i2c-mux@75 { /* u23 */
153 compatible = "nxp,pca9544";
154 #address-cells = <1>;
158 #address-cells = <1>;
162 /* PMBUS_ALERT done via pca9544 */
163 ina226@40 { /* u67 */
164 compatible = "ti,ina226";
166 shunt-resistor = <2000>;
168 ina226@41 { /* u59 */
169 compatible = "ti,ina226";
171 shunt-resistor = <5000>;
173 ina226@42 { /* u61 */
174 compatible = "ti,ina226";
176 shunt-resistor = <5000>;
178 ina226@43 { /* u60 */
179 compatible = "ti,ina226";
181 shunt-resistor = <5000>;
183 ina226@45 { /* u64 */
184 compatible = "ti,ina226";
186 shunt-resistor = <5000>;
188 ina226@46 { /* u69 */
189 compatible = "ti,ina226";
191 shunt-resistor = <2000>;
193 ina226@47 { /* u66 */
194 compatible = "ti,ina226";
196 shunt-resistor = <5000>;
198 ina226@48 { /* u65 */
199 compatible = "ti,ina226";
201 shunt-resistor = <5000>;
203 ina226@49 { /* u63 */
204 compatible = "ti,ina226";
206 shunt-resistor = <5000>;
209 compatible = "ti,ina226";
211 shunt-resistor = <5000>;
213 ina226@4b { /* u71 */
214 compatible = "ti,ina226";
216 shunt-resistor = <5000>;
218 ina226@4c { /* u77 */
219 compatible = "ti,ina226";
221 shunt-resistor = <5000>;
223 ina226@4d { /* u73 */
224 compatible = "ti,ina226";
226 shunt-resistor = <5000>;
228 ina226@4e { /* u79 */
229 compatible = "ti,ina226";
231 shunt-resistor = <5000>;
235 #address-cells = <1>;
241 #address-cells = <1>;
244 irps5401_43: irps54012@43 { /* IRPS5401 - u53 check these */
246 compatible = "infineon,irps5401";
249 irps5401_44: irps54012@44 { /* IRPS5401 - u55 */
251 compatible = "infineon,irps5401";
254 irps5401_45: irps54012@45 { /* IRPS5401 - u57 */
256 compatible = "infineon,irps5401";
267 #address-cells = <1>;
277 clock-frequency = <400000>;
279 i2c-mux@74 { /* u26 */
280 compatible = "nxp,pca9548";
281 #address-cells = <1>;
285 #address-cells = <1>;
289 * IIC_EEPROM 1kB memory which uses 256B blocks
290 * where every block has different address.
291 * 0 - 256B address 0x54
292 * 256B - 512B address 0x55
293 * 512B - 768B address 0x56
294 * 768B - 1024B address 0x57
296 eeprom: eeprom@54 { /* u88 */
297 compatible = "atmel,24c08";
302 #address-cells = <1>;
305 si5341: clock-generator@36 { /* SI5341 - u46 */
306 compatible = "si5341";
312 #address-cells = <1>;
315 si570_1: clock-generator@5d { /* USER SI570 - u47 */
317 compatible = "silabs,si570";
319 temperature-stability = <50>;
320 factory-fout = <300000000>;
321 clock-frequency = <300000000>;
322 clock-output-names = "si570_user";
326 #address-cells = <1>;
329 si570_2: clock-generator@5d { /* USER MGT SI570 - u49 */
331 compatible = "silabs,si570";
333 temperature-stability = <50>;
334 factory-fout = <156250000>;
335 clock-frequency = <148500000>;
336 clock-output-names = "si570_mgt";
340 #address-cells = <1>;
343 si5328: clock-generator@69 { /* SI5328 - u48 */
344 compatible = "silabs,si5328";
349 #address-cells = <1>;
352 sc18is603@2f { /* sc18is602 - u93 */
353 compatible = "nxp,sc18is603";
355 /* 4 gpios for CS not handled by driver */
366 #address-cells = <1>;
375 compatible = "nxp,pca9548"; /* u27 */
376 #address-cells = <1>;
381 #address-cells = <1>;
387 #address-cells = <1>;
393 #address-cells = <1>;
399 #address-cells = <1>;
405 #address-cells = <1>;
411 #address-cells = <1>;
417 #address-cells = <1>;
423 #address-cells = <1>;
435 compatible = "m25p80", "jedec,spi-nor"; /* 32MB */
436 #address-cells = <1>;
439 spi-tx-bus-width = <1>;
440 spi-rx-bus-width = <4>; /* FIXME also DUAL configuration possible */
441 spi-max-frequency = <108000000>; /* Based on DC1 spec */
442 partition@qspi-fsbl-uboot { /* for testing purpose */
443 label = "qspi-fsbl-uboot";
444 reg = <0x0 0x100000>;
446 partition@qspi-linux { /* for testing purpose */
447 label = "qspi-linux";
448 reg = <0x100000 0x500000>;
450 partition@qspi-device-tree { /* for testing purpose */
451 label = "qspi-device-tree";
452 reg = <0x600000 0x20000>;
454 partition@qspi-rootfs { /* for testing purpose */
455 label = "qspi-rootfs";
456 reg = <0x620000 0x5E0000>;
467 /* SATA OOB timing settings */
468 ceva,p0-cominit-params = /bits/ 8 <0x18 0x40 0x18 0x28>;
469 ceva,p0-comwake-params = /bits/ 8 <0x06 0x14 0x08 0x0E>;
470 ceva,p0-burst-params = /bits/ 8 <0x13 0x08 0x4A 0x06>;
471 ceva,p0-retry-params = /bits/ 16 <0x96A4 0x3FFC>;
472 ceva,p1-cominit-params = /bits/ 8 <0x18 0x40 0x18 0x28>;
473 ceva,p1-comwake-params = /bits/ 8 <0x06 0x14 0x08 0x0E>;
474 ceva,p1-burst-params = /bits/ 8 <0x13 0x08 0x4A 0x06>;
475 ceva,p1-retry-params = /bits/ 16 <0x96A4 0x3FFC>;
476 phy-names = "sata-phy";
477 phys = <&lane3 PHY_TYPE_SATA 1 3 125000000>;
480 /* SD1 with level shifter */
496 /* ULPI SMSC USB3320 */
504 snps,usb3_lpm_capable;
505 phy-names = "usb3-phy";
506 phys = <&lane2 PHY_TYPE_USB3 0 2 26000000>;