1 // SPDX-License-Identifier: GPL-2.0+
3 * dts file for Xilinx ZynqMP ZCU106
5 * (C) Copyright 2016, Xilinx, Inc.
7 * Michal Simek <michal.simek@xilinx.com>
12 #include "zynqmp.dtsi"
13 #include "zynqmp-clk-ccf.dtsi"
14 #include <dt-bindings/input/input.h>
15 #include <dt-bindings/gpio/gpio.h>
16 #include <dt-bindings/phy/phy.h>
19 model = "ZynqMP ZCU106 RevA";
20 compatible = "xlnx,zynqmp-zcu106-revA", "xlnx,zynqmp-zcu106", "xlnx,zynqmp";
37 bootargs = "earlycon";
38 stdout-path = "serial0:115200n8";
42 device_type = "memory";
43 reg = <0x0 0x0 0x0 0x80000000>, <0x8 0x00000000 0x0 0x80000000>;
47 compatible = "gpio-keys";
53 gpios = <&gpio 22 GPIO_ACTIVE_HIGH>;
54 linux,code = <KEY_DOWN>;
61 compatible = "gpio-leds";
64 gpios = <&gpio 23 GPIO_ACTIVE_HIGH>;
65 linux,default-trigger = "heartbeat";
112 phy-handle = <&phy0>;
113 phy-mode = "rgmii-id";
116 ti,rx-internal-delay = <0x8>;
117 ti,tx-internal-delay = <0xa>;
118 ti,fifo-depth = <0x1>;
132 clock-frequency = <400000>;
134 tca6416_u97: gpio@20 {
135 compatible = "ti,tca6416";
137 gpio-controller; /* interrupt not connected */
142 * 0 - SFP_SI5328_INT_ALM
143 * 1 - HDMI_SI5328_INT_ALM
144 * 5 - IIC_MUX_RESET_B
145 * 6 - GEM3_EXP_RESET_B
146 * 10 - FMC_HPC0_PRSNT_M2C_B
147 * 11 - FMC_HPC1_PRSNT_M2C_B
148 * 2-4, 7, 12-17 - not connected
152 tca6416_u61: gpio@21 {
153 compatible = "ti,tca6416";
164 * 4 - MIO26_PMU_INPUT_LS
167 * 7 - MAXIM_PMBUS_ALERT
168 * 10 - PL_DDR4_VTERM_EN
169 * 11 - PL_DDR4_VPP_2V5_EN
170 * 12 - PS_DIMM_VDDQ_TO_PSVCCO_ON
171 * 13 - PS_DIMM_SUSPEND_EN
172 * 14 - PS_DDR4_VTERM_EN
173 * 15 - PS_DDR4_VPP_2V5_EN
174 * 16 - 17 - not connected
178 i2c-mux@75 { /* u60 */
179 compatible = "nxp,pca9544";
180 #address-cells = <1>;
184 #address-cells = <1>;
188 ina226@40 { /* u76 */
189 compatible = "ti,ina226";
191 shunt-resistor = <5000>;
193 ina226@41 { /* u77 */
194 compatible = "ti,ina226";
196 shunt-resistor = <5000>;
198 ina226@42 { /* u78 */
199 compatible = "ti,ina226";
201 shunt-resistor = <5000>;
203 ina226@43 { /* u87 */
204 compatible = "ti,ina226";
206 shunt-resistor = <5000>;
208 ina226@44 { /* u85 */
209 compatible = "ti,ina226";
211 shunt-resistor = <5000>;
213 ina226@45 { /* u86 */
214 compatible = "ti,ina226";
216 shunt-resistor = <5000>;
218 ina226@46 { /* u93 */
219 compatible = "ti,ina226";
221 shunt-resistor = <5000>;
223 ina226@47 { /* u88 */
224 compatible = "ti,ina226";
226 shunt-resistor = <5000>;
228 ina226@4a { /* u15 */
229 compatible = "ti,ina226";
231 shunt-resistor = <5000>;
233 ina226@4b { /* u92 */
234 compatible = "ti,ina226";
236 shunt-resistor = <5000>;
240 #address-cells = <1>;
244 ina226@40 { /* u79 */
245 compatible = "ti,ina226";
247 shunt-resistor = <2000>;
249 ina226@41 { /* u81 */
250 compatible = "ti,ina226";
252 shunt-resistor = <5000>;
254 ina226@42 { /* u80 */
255 compatible = "ti,ina226";
257 shunt-resistor = <5000>;
259 ina226@43 { /* u84 */
260 compatible = "ti,ina226";
262 shunt-resistor = <5000>;
264 ina226@44 { /* u16 */
265 compatible = "ti,ina226";
267 shunt-resistor = <5000>;
269 ina226@45 { /* u65 */
270 compatible = "ti,ina226";
272 shunt-resistor = <5000>;
274 ina226@46 { /* u74 */
275 compatible = "ti,ina226";
277 shunt-resistor = <5000>;
279 ina226@47 { /* u75 */
280 compatible = "ti,ina226";
282 shunt-resistor = <5000>;
286 #address-cells = <1>;
289 /* MAXIM_PMBUS - 00 */
290 max15301@a { /* u46 */
291 compatible = "maxim,max15301";
294 max15303@b { /* u4 */
295 compatible = "maxim,max15303";
298 max15303@10 { /* u13 */
299 compatible = "maxim,max15303";
302 max15301@13 { /* u47 */
303 compatible = "maxim,max15301";
306 max15303@14 { /* u7 */
307 compatible = "maxim,max15303";
310 max15303@15 { /* u6 */
311 compatible = "maxim,max15303";
314 max15303@16 { /* u10 */
315 compatible = "maxim,max15303";
318 max15303@17 { /* u9 */
319 compatible = "maxim,max15303";
322 max15301@18 { /* u63 */
323 compatible = "maxim,max15301";
326 max15303@1a { /* u49 */
327 compatible = "maxim,max15303";
330 max15303@1b { /* u8 */
331 compatible = "maxim,max15303";
334 max15303@1d { /* u18 */
335 compatible = "maxim,max15303";
339 max20751@72 { /* u95 */
340 compatible = "maxim,max20751";
343 max20751@73 { /* u96 */
344 compatible = "maxim,max20751";
348 /* Bus 3 is not connected */
354 clock-frequency = <400000>;
356 /* PL i2c via PCA9306 - u45 */
357 i2c-mux@74 { /* u34 */
358 compatible = "nxp,pca9548";
359 #address-cells = <1>;
363 #address-cells = <1>;
367 * IIC_EEPROM 1kB memory which uses 256B blocks
368 * where every block has different address.
369 * 0 - 256B address 0x54
370 * 256B - 512B address 0x55
371 * 512B - 768B address 0x56
372 * 768B - 1024B address 0x57
374 eeprom: eeprom@54 { /* u23 */
375 compatible = "atmel,24c08";
380 #address-cells = <1>;
383 si5341: clock-generator@36 { /* SI5341 - u69 */
384 compatible = "si5341";
390 #address-cells = <1>;
393 si570_1: clock-generator@5d { /* USER SI570 - u42 */
395 compatible = "silabs,si570";
397 temperature-stability = <50>;
398 factory-fout = <300000000>;
399 clock-frequency = <300000000>;
403 #address-cells = <1>;
406 si570_2: clock-generator@5d { /* USER MGT SI570 - u56 */
408 compatible = "silabs,si570";
410 temperature-stability = <50>; /* copy from zc702 */
411 factory-fout = <156250000>;
412 clock-frequency = <148500000>;
416 #address-cells = <1>;
419 si5328: clock-generator@69 {/* SI5328 - u20 */
420 compatible = "silabs,si5328";
425 #address-cells = <1>;
427 reg = <5>; /* FAN controller */
428 temp@4c {/* lm96163 - u128 */
429 compatible = "national,lm96163";
433 /* 6 - 7 unconnected */
437 compatible = "nxp,pca9548"; /* u135 */
438 #address-cells = <1>;
443 #address-cells = <1>;
449 #address-cells = <1>;
455 #address-cells = <1>;
461 #address-cells = <1>;
465 dev@19 { /* u-boot detection */
469 dev@30 { /* u-boot detection */
473 dev@35 { /* u-boot detection */
477 dev@36 { /* u-boot detection */
481 dev@51 { /* u-boot detection - maybe SPD */
487 #address-cells = <1>;
493 #address-cells = <1>;
499 #address-cells = <1>;
505 #address-cells = <1>;
517 compatible = "m25p80"; /* 32MB */
518 #address-cells = <1>;
521 spi-tx-bus-width = <1>;
522 spi-rx-bus-width = <4>; /* FIXME also DUAL configuration possible */
523 spi-max-frequency = <108000000>; /* Based on DC1 spec */
524 partition@qspi-fsbl-uboot { /* for testing purpose */
525 label = "qspi-fsbl-uboot";
526 reg = <0x0 0x100000>;
528 partition@qspi-linux { /* for testing purpose */
529 label = "qspi-linux";
530 reg = <0x100000 0x500000>;
532 partition@qspi-device-tree { /* for testing purpose */
533 label = "qspi-device-tree";
534 reg = <0x600000 0x20000>;
536 partition@qspi-rootfs { /* for testing purpose */
537 label = "qspi-rootfs";
538 reg = <0x620000 0x5E0000>;
549 /* SATA OOB timing settings */
550 ceva,p0-cominit-params = /bits/ 8 <0x18 0x40 0x18 0x28>;
551 ceva,p0-comwake-params = /bits/ 8 <0x06 0x14 0x08 0x0E>;
552 ceva,p0-burst-params = /bits/ 8 <0x13 0x08 0x4A 0x06>;
553 ceva,p0-retry-params = /bits/ 16 <0x96A4 0x3FFC>;
554 ceva,p1-cominit-params = /bits/ 8 <0x18 0x40 0x18 0x28>;
555 ceva,p1-comwake-params = /bits/ 8 <0x06 0x14 0x08 0x0E>;
556 ceva,p1-burst-params = /bits/ 8 <0x13 0x08 0x4A 0x06>;
557 ceva,p1-retry-params = /bits/ 16 <0x96A4 0x3FFC>;
558 phy-names = "sata-phy";
559 phys = <&lane3 PHY_TYPE_SATA 1 1 125000000>;
562 /* SD1 with level shifter */
581 /* ULPI SMSC USB3320 */
589 snps,usb3_lpm_capable;
590 phy-names = "usb3-phy";
591 phys = <&lane2 PHY_TYPE_USB3 0 2 26000000>;