1 // SPDX-License-Identifier: GPL-2.0+
3 * dts file for Xilinx ZynqMP ZCU106
5 * (C) Copyright 2016, Xilinx, Inc.
7 * Michal Simek <michal.simek@xilinx.com>
12 #include "zynqmp.dtsi"
13 #include "zynqmp-clk-ccf.dtsi"
14 #include <dt-bindings/input/input.h>
15 #include <dt-bindings/gpio/gpio.h>
16 #include <dt-bindings/phy/phy.h>
19 model = "ZynqMP ZCU106 RevA";
20 compatible = "xlnx,zynqmp-zcu106-revA", "xlnx,zynqmp-zcu106", "xlnx,zynqmp";
37 bootargs = "earlycon";
38 stdout-path = "serial0:115200n8";
42 device_type = "memory";
43 reg = <0x0 0x0 0x0 0x80000000>, <0x8 0x00000000 0x0 0x80000000>;
47 compatible = "gpio-keys";
51 gpios = <&gpio 22 GPIO_ACTIVE_HIGH>;
52 linux,code = <KEY_DOWN>;
59 compatible = "gpio-leds";
62 gpios = <&gpio 23 GPIO_ACTIVE_HIGH>;
63 linux,default-trigger = "heartbeat";
110 phy-handle = <&phy0>;
111 phy-mode = "rgmii-id";
114 ti,rx-internal-delay = <0x8>;
115 ti,tx-internal-delay = <0xa>;
116 ti,fifo-depth = <0x1>;
130 clock-frequency = <400000>;
132 tca6416_u97: gpio@20 {
133 compatible = "ti,tca6416";
135 gpio-controller; /* interrupt not connected */
140 * 0 - SFP_SI5328_INT_ALM
141 * 1 - HDMI_SI5328_INT_ALM
142 * 5 - IIC_MUX_RESET_B
143 * 6 - GEM3_EXP_RESET_B
144 * 10 - FMC_HPC0_PRSNT_M2C_B
145 * 11 - FMC_HPC1_PRSNT_M2C_B
146 * 2-4, 7, 12-17 - not connected
150 tca6416_u61: gpio@21 {
151 compatible = "ti,tca6416";
162 * 4 - MIO26_PMU_INPUT_LS
165 * 7 - MAXIM_PMBUS_ALERT
166 * 10 - PL_DDR4_VTERM_EN
167 * 11 - PL_DDR4_VPP_2V5_EN
168 * 12 - PS_DIMM_VDDQ_TO_PSVCCO_ON
169 * 13 - PS_DIMM_SUSPEND_EN
170 * 14 - PS_DDR4_VTERM_EN
171 * 15 - PS_DDR4_VPP_2V5_EN
172 * 16 - 17 - not connected
176 i2c-mux@75 { /* u60 */
177 compatible = "nxp,pca9544";
178 #address-cells = <1>;
182 #address-cells = <1>;
186 ina226@40 { /* u76 */
187 compatible = "ti,ina226";
189 shunt-resistor = <5000>;
191 ina226@41 { /* u77 */
192 compatible = "ti,ina226";
194 shunt-resistor = <5000>;
196 ina226@42 { /* u78 */
197 compatible = "ti,ina226";
199 shunt-resistor = <5000>;
201 ina226@43 { /* u87 */
202 compatible = "ti,ina226";
204 shunt-resistor = <5000>;
206 ina226@44 { /* u85 */
207 compatible = "ti,ina226";
209 shunt-resistor = <5000>;
211 ina226@45 { /* u86 */
212 compatible = "ti,ina226";
214 shunt-resistor = <5000>;
216 ina226@46 { /* u93 */
217 compatible = "ti,ina226";
219 shunt-resistor = <5000>;
221 ina226@47 { /* u88 */
222 compatible = "ti,ina226";
224 shunt-resistor = <5000>;
226 ina226@4a { /* u15 */
227 compatible = "ti,ina226";
229 shunt-resistor = <5000>;
231 ina226@4b { /* u92 */
232 compatible = "ti,ina226";
234 shunt-resistor = <5000>;
238 #address-cells = <1>;
242 ina226@40 { /* u79 */
243 compatible = "ti,ina226";
245 shunt-resistor = <2000>;
247 ina226@41 { /* u81 */
248 compatible = "ti,ina226";
250 shunt-resistor = <5000>;
252 ina226@42 { /* u80 */
253 compatible = "ti,ina226";
255 shunt-resistor = <5000>;
257 ina226@43 { /* u84 */
258 compatible = "ti,ina226";
260 shunt-resistor = <5000>;
262 ina226@44 { /* u16 */
263 compatible = "ti,ina226";
265 shunt-resistor = <5000>;
267 ina226@45 { /* u65 */
268 compatible = "ti,ina226";
270 shunt-resistor = <5000>;
272 ina226@46 { /* u74 */
273 compatible = "ti,ina226";
275 shunt-resistor = <5000>;
277 ina226@47 { /* u75 */
278 compatible = "ti,ina226";
280 shunt-resistor = <5000>;
284 #address-cells = <1>;
287 /* MAXIM_PMBUS - 00 */
288 max15301@a { /* u46 */
289 compatible = "maxim,max15301";
292 max15303@b { /* u4 */
293 compatible = "maxim,max15303";
296 max15303@10 { /* u13 */
297 compatible = "maxim,max15303";
300 max15301@13 { /* u47 */
301 compatible = "maxim,max15301";
304 max15303@14 { /* u7 */
305 compatible = "maxim,max15303";
308 max15303@15 { /* u6 */
309 compatible = "maxim,max15303";
312 max15303@16 { /* u10 */
313 compatible = "maxim,max15303";
316 max15303@17 { /* u9 */
317 compatible = "maxim,max15303";
320 max15301@18 { /* u63 */
321 compatible = "maxim,max15301";
324 max15303@1a { /* u49 */
325 compatible = "maxim,max15303";
328 max15303@1b { /* u8 */
329 compatible = "maxim,max15303";
332 max15303@1d { /* u18 */
333 compatible = "maxim,max15303";
337 max20751@72 { /* u95 */
338 compatible = "maxim,max20751";
341 max20751@73 { /* u96 */
342 compatible = "maxim,max20751";
346 /* Bus 3 is not connected */
352 clock-frequency = <400000>;
354 /* PL i2c via PCA9306 - u45 */
355 i2c-mux@74 { /* u34 */
356 compatible = "nxp,pca9548";
357 #address-cells = <1>;
361 #address-cells = <1>;
365 * IIC_EEPROM 1kB memory which uses 256B blocks
366 * where every block has different address.
367 * 0 - 256B address 0x54
368 * 256B - 512B address 0x55
369 * 512B - 768B address 0x56
370 * 768B - 1024B address 0x57
372 eeprom: eeprom@54 { /* u23 */
373 compatible = "atmel,24c08";
378 #address-cells = <1>;
381 si5341: clock-generator@36 { /* SI5341 - u69 */
382 compatible = "si5341";
388 #address-cells = <1>;
391 si570_1: clock-generator@5d { /* USER SI570 - u42 */
393 compatible = "silabs,si570";
395 temperature-stability = <50>;
396 factory-fout = <300000000>;
397 clock-frequency = <300000000>;
401 #address-cells = <1>;
404 si570_2: clock-generator@5d { /* USER MGT SI570 - u56 */
406 compatible = "silabs,si570";
408 temperature-stability = <50>; /* copy from zc702 */
409 factory-fout = <156250000>;
410 clock-frequency = <148500000>;
414 #address-cells = <1>;
417 si5328: clock-generator@69 {/* SI5328 - u20 */
418 compatible = "silabs,si5328";
423 #address-cells = <1>;
425 reg = <5>; /* FAN controller */
426 temp@4c {/* lm96163 - u128 */
427 compatible = "national,lm96163";
431 /* 6 - 7 unconnected */
435 compatible = "nxp,pca9548"; /* u135 */
436 #address-cells = <1>;
441 #address-cells = <1>;
447 #address-cells = <1>;
453 #address-cells = <1>;
459 #address-cells = <1>;
463 dev@19 { /* u-boot detection */
467 dev@30 { /* u-boot detection */
471 dev@35 { /* u-boot detection */
475 dev@36 { /* u-boot detection */
479 dev@51 { /* u-boot detection - maybe SPD */
485 #address-cells = <1>;
491 #address-cells = <1>;
497 #address-cells = <1>;
503 #address-cells = <1>;
515 compatible = "m25p80"; /* 32MB */
516 #address-cells = <1>;
519 spi-tx-bus-width = <1>;
520 spi-rx-bus-width = <4>; /* FIXME also DUAL configuration possible */
521 spi-max-frequency = <108000000>; /* Based on DC1 spec */
522 partition@qspi-fsbl-uboot { /* for testing purpose */
523 label = "qspi-fsbl-uboot";
524 reg = <0x0 0x100000>;
526 partition@qspi-linux { /* for testing purpose */
527 label = "qspi-linux";
528 reg = <0x100000 0x500000>;
530 partition@qspi-device-tree { /* for testing purpose */
531 label = "qspi-device-tree";
532 reg = <0x600000 0x20000>;
534 partition@qspi-rootfs { /* for testing purpose */
535 label = "qspi-rootfs";
536 reg = <0x620000 0x5E0000>;
547 /* SATA OOB timing settings */
548 ceva,p0-cominit-params = /bits/ 8 <0x18 0x40 0x18 0x28>;
549 ceva,p0-comwake-params = /bits/ 8 <0x06 0x14 0x08 0x0E>;
550 ceva,p0-burst-params = /bits/ 8 <0x13 0x08 0x4A 0x06>;
551 ceva,p0-retry-params = /bits/ 16 <0x96A4 0x3FFC>;
552 ceva,p1-cominit-params = /bits/ 8 <0x18 0x40 0x18 0x28>;
553 ceva,p1-comwake-params = /bits/ 8 <0x06 0x14 0x08 0x0E>;
554 ceva,p1-burst-params = /bits/ 8 <0x13 0x08 0x4A 0x06>;
555 ceva,p1-retry-params = /bits/ 16 <0x96A4 0x3FFC>;
556 phy-names = "sata-phy";
557 phys = <&lane3 PHY_TYPE_SATA 1 1 125000000>;
560 /* SD1 with level shifter */
579 /* ULPI SMSC USB3320 */
587 snps,usb3_lpm_capable;
588 phy-names = "usb3-phy";
589 phys = <&lane2 PHY_TYPE_USB3 0 2 26000000>;