1 // SPDX-License-Identifier: GPL-2.0+
3 * dts file for Xilinx ZynqMP ZCU106
5 * (C) Copyright 2016, Xilinx, Inc.
7 * Michal Simek <michal.simek@xilinx.com>
12 #include "zynqmp.dtsi"
13 #include "zynqmp-clk-ccf.dtsi"
14 #include <dt-bindings/input/input.h>
15 #include <dt-bindings/gpio/gpio.h>
16 #include <dt-bindings/phy/phy.h>
19 model = "ZynqMP ZCU106 RevA";
20 compatible = "xlnx,zynqmp-zcu106-revA", "xlnx,zynqmp-zcu106", "xlnx,zynqmp";
37 bootargs = "earlycon";
38 stdout-path = "serial0:115200n8";
39 xlnx,eeprom = &eeprom;
43 device_type = "memory";
44 reg = <0x0 0x0 0x0 0x80000000>, <0x8 0x00000000 0x0 0x80000000>;
48 compatible = "gpio-keys";
52 gpios = <&gpio 22 GPIO_ACTIVE_HIGH>;
53 linux,code = <KEY_DOWN>;
60 compatible = "gpio-leds";
63 gpios = <&gpio 23 GPIO_ACTIVE_HIGH>;
64 linux,default-trigger = "heartbeat";
111 phy-handle = <&phy0>;
112 phy-mode = "rgmii-id";
115 ti,rx-internal-delay = <0x8>;
116 ti,tx-internal-delay = <0xa>;
117 ti,fifo-depth = <0x1>;
131 clock-frequency = <400000>;
133 tca6416_u97: gpio@20 {
134 compatible = "ti,tca6416";
136 gpio-controller; /* interrupt not connected */
141 * 0 - SFP_SI5328_INT_ALM
142 * 1 - HDMI_SI5328_INT_ALM
143 * 5 - IIC_MUX_RESET_B
144 * 6 - GEM3_EXP_RESET_B
145 * 10 - FMC_HPC0_PRSNT_M2C_B
146 * 11 - FMC_HPC1_PRSNT_M2C_B
147 * 2-4, 7, 12-17 - not connected
151 tca6416_u61: gpio@21 {
152 compatible = "ti,tca6416";
163 * 4 - MIO26_PMU_INPUT_LS
166 * 7 - MAXIM_PMBUS_ALERT
167 * 10 - PL_DDR4_VTERM_EN
168 * 11 - PL_DDR4_VPP_2V5_EN
169 * 12 - PS_DIMM_VDDQ_TO_PSVCCO_ON
170 * 13 - PS_DIMM_SUSPEND_EN
171 * 14 - PS_DDR4_VTERM_EN
172 * 15 - PS_DDR4_VPP_2V5_EN
173 * 16 - 17 - not connected
177 i2c-mux@75 { /* u60 */
178 compatible = "nxp,pca9544";
179 #address-cells = <1>;
183 #address-cells = <1>;
187 ina226@40 { /* u76 */
188 compatible = "ti,ina226";
190 shunt-resistor = <5000>;
192 ina226@41 { /* u77 */
193 compatible = "ti,ina226";
195 shunt-resistor = <5000>;
197 ina226@42 { /* u78 */
198 compatible = "ti,ina226";
200 shunt-resistor = <5000>;
202 ina226@43 { /* u87 */
203 compatible = "ti,ina226";
205 shunt-resistor = <5000>;
207 ina226@44 { /* u85 */
208 compatible = "ti,ina226";
210 shunt-resistor = <5000>;
212 ina226@45 { /* u86 */
213 compatible = "ti,ina226";
215 shunt-resistor = <5000>;
217 ina226@46 { /* u93 */
218 compatible = "ti,ina226";
220 shunt-resistor = <5000>;
222 ina226@47 { /* u88 */
223 compatible = "ti,ina226";
225 shunt-resistor = <5000>;
227 ina226@4a { /* u15 */
228 compatible = "ti,ina226";
230 shunt-resistor = <5000>;
232 ina226@4b { /* u92 */
233 compatible = "ti,ina226";
235 shunt-resistor = <5000>;
239 #address-cells = <1>;
243 ina226@40 { /* u79 */
244 compatible = "ti,ina226";
246 shunt-resistor = <2000>;
248 ina226@41 { /* u81 */
249 compatible = "ti,ina226";
251 shunt-resistor = <5000>;
253 ina226@42 { /* u80 */
254 compatible = "ti,ina226";
256 shunt-resistor = <5000>;
258 ina226@43 { /* u84 */
259 compatible = "ti,ina226";
261 shunt-resistor = <5000>;
263 ina226@44 { /* u16 */
264 compatible = "ti,ina226";
266 shunt-resistor = <5000>;
268 ina226@45 { /* u65 */
269 compatible = "ti,ina226";
271 shunt-resistor = <5000>;
273 ina226@46 { /* u74 */
274 compatible = "ti,ina226";
276 shunt-resistor = <5000>;
278 ina226@47 { /* u75 */
279 compatible = "ti,ina226";
281 shunt-resistor = <5000>;
285 #address-cells = <1>;
288 /* MAXIM_PMBUS - 00 */
289 max15301@a { /* u46 */
290 compatible = "maxim,max15301";
293 max15303@b { /* u4 */
294 compatible = "maxim,max15303";
297 max15303@10 { /* u13 */
298 compatible = "maxim,max15303";
301 max15301@13 { /* u47 */
302 compatible = "maxim,max15301";
305 max15303@14 { /* u7 */
306 compatible = "maxim,max15303";
309 max15303@15 { /* u6 */
310 compatible = "maxim,max15303";
313 max15303@16 { /* u10 */
314 compatible = "maxim,max15303";
317 max15303@17 { /* u9 */
318 compatible = "maxim,max15303";
321 max15301@18 { /* u63 */
322 compatible = "maxim,max15301";
325 max15303@1a { /* u49 */
326 compatible = "maxim,max15303";
329 max15303@1b { /* u8 */
330 compatible = "maxim,max15303";
333 max15303@1d { /* u18 */
334 compatible = "maxim,max15303";
338 max20751@72 { /* u95 */
339 compatible = "maxim,max20751";
342 max20751@73 { /* u96 */
343 compatible = "maxim,max20751";
347 /* Bus 3 is not connected */
353 clock-frequency = <400000>;
355 /* PL i2c via PCA9306 - u45 */
356 i2c-mux@74 { /* u34 */
357 compatible = "nxp,pca9548";
358 #address-cells = <1>;
362 #address-cells = <1>;
366 * IIC_EEPROM 1kB memory which uses 256B blocks
367 * where every block has different address.
368 * 0 - 256B address 0x54
369 * 256B - 512B address 0x55
370 * 512B - 768B address 0x56
371 * 768B - 1024B address 0x57
373 eeprom: eeprom@54 { /* u23 */
374 compatible = "atmel,24c08";
379 #address-cells = <1>;
382 si5341: clock-generator@36 { /* SI5341 - u69 */
383 compatible = "si5341";
389 #address-cells = <1>;
392 si570_1: clock-generator@5d { /* USER SI570 - u42 */
394 compatible = "silabs,si570";
396 temperature-stability = <50>;
397 factory-fout = <300000000>;
398 clock-frequency = <300000000>;
399 clock-output-names = "si570_user";
403 #address-cells = <1>;
406 si570_2: clock-generator@5d { /* USER MGT SI570 - u56 */
408 compatible = "silabs,si570";
410 temperature-stability = <50>; /* copy from zc702 */
411 factory-fout = <156250000>;
412 clock-frequency = <148500000>;
413 clock-output-names = "si570_mgt";
417 #address-cells = <1>;
420 si5328: clock-generator@69 {/* SI5328 - u20 */
421 compatible = "silabs,si5328";
426 #address-cells = <1>;
428 reg = <5>; /* FAN controller */
429 temp@4c {/* lm96163 - u128 */
430 compatible = "national,lm96163";
434 /* 6 - 7 unconnected */
438 compatible = "nxp,pca9548"; /* u135 */
439 #address-cells = <1>;
444 #address-cells = <1>;
450 #address-cells = <1>;
456 #address-cells = <1>;
462 #address-cells = <1>;
468 #address-cells = <1>;
474 #address-cells = <1>;
480 #address-cells = <1>;
486 #address-cells = <1>;
498 compatible = "m25p80", "jedec,spi-nor"; /* 32MB */
499 #address-cells = <1>;
502 spi-tx-bus-width = <1>;
503 spi-rx-bus-width = <4>; /* FIXME also DUAL configuration possible */
504 spi-max-frequency = <108000000>; /* Based on DC1 spec */
505 partition@qspi-fsbl-uboot { /* for testing purpose */
506 label = "qspi-fsbl-uboot";
507 reg = <0x0 0x100000>;
509 partition@qspi-linux { /* for testing purpose */
510 label = "qspi-linux";
511 reg = <0x100000 0x500000>;
513 partition@qspi-device-tree { /* for testing purpose */
514 label = "qspi-device-tree";
515 reg = <0x600000 0x20000>;
517 partition@qspi-rootfs { /* for testing purpose */
518 label = "qspi-rootfs";
519 reg = <0x620000 0x5E0000>;
530 /* SATA OOB timing settings */
531 ceva,p0-cominit-params = /bits/ 8 <0x18 0x40 0x18 0x28>;
532 ceva,p0-comwake-params = /bits/ 8 <0x06 0x14 0x08 0x0E>;
533 ceva,p0-burst-params = /bits/ 8 <0x13 0x08 0x4A 0x06>;
534 ceva,p0-retry-params = /bits/ 16 <0x96A4 0x3FFC>;
535 ceva,p1-cominit-params = /bits/ 8 <0x18 0x40 0x18 0x28>;
536 ceva,p1-comwake-params = /bits/ 8 <0x06 0x14 0x08 0x0E>;
537 ceva,p1-burst-params = /bits/ 8 <0x13 0x08 0x4A 0x06>;
538 ceva,p1-retry-params = /bits/ 16 <0x96A4 0x3FFC>;
539 phy-names = "sata-phy";
540 phys = <&lane3 PHY_TYPE_SATA 1 1 125000000>;
543 /* SD1 with level shifter */
562 /* ULPI SMSC USB3320 */
570 snps,usb3_lpm_capable;
571 phy-names = "usb3-phy";
572 phys = <&lane2 PHY_TYPE_USB3 0 2 26000000>;