1 // SPDX-License-Identifier: GPL-2.0+
3 * dts file for Xilinx ZynqMP ZCU106
5 * (C) Copyright 2016 - 2020, Xilinx, Inc.
7 * Michal Simek <michal.simek@xilinx.com>
12 #include "zynqmp.dtsi"
13 #include "zynqmp-clk-ccf.dtsi"
14 #include <dt-bindings/input/input.h>
15 #include <dt-bindings/gpio/gpio.h>
16 #include <dt-bindings/phy/phy.h>
19 model = "ZynqMP ZCU106 RevA";
20 compatible = "xlnx,zynqmp-zcu106-revA", "xlnx,zynqmp-zcu106", "xlnx,zynqmp";
37 bootargs = "earlycon";
38 stdout-path = "serial0:115200n8";
39 xlnx,eeprom = &eeprom;
43 device_type = "memory";
44 reg = <0x0 0x0 0x0 0x80000000>, <0x8 0x00000000 0x0 0x80000000>;
48 compatible = "gpio-keys";
52 gpios = <&gpio 22 GPIO_ACTIVE_HIGH>;
53 linux,code = <KEY_DOWN>;
60 compatible = "gpio-leds";
63 gpios = <&gpio 23 GPIO_ACTIVE_HIGH>;
64 linux,default-trigger = "heartbeat";
69 compatible = "iio-hwmon";
70 io-channels = <&u76 0>, <&u76 1>, <&u76 2>, <&u76 3>;
73 compatible = "iio-hwmon";
74 io-channels = <&u77 0>, <&u77 1>, <&u77 2>, <&u77 3>;
77 compatible = "iio-hwmon";
78 io-channels = <&u78 0>, <&u78 1>, <&u78 2>, <&u78 3>;
81 compatible = "iio-hwmon";
82 io-channels = <&u87 0>, <&u87 1>, <&u87 2>, <&u87 3>;
85 compatible = "iio-hwmon";
86 io-channels = <&u85 0>, <&u85 1>, <&u85 2>, <&u85 3>;
89 compatible = "iio-hwmon";
90 io-channels = <&u86 0>, <&u86 1>, <&u86 2>, <&u86 3>;
93 compatible = "iio-hwmon";
94 io-channels = <&u93 0>, <&u93 1>, <&u93 2>, <&u93 3>;
97 compatible = "iio-hwmon";
98 io-channels = <&u88 0>, <&u88 1>, <&u88 2>, <&u88 3>;
101 compatible = "iio-hwmon";
102 io-channels = <&u15 0>, <&u15 1>, <&u15 2>, <&u15 3>;
105 compatible = "iio-hwmon";
106 io-channels = <&u92 0>, <&u92 1>, <&u92 2>, <&u92 3>;
109 compatible = "iio-hwmon";
110 io-channels = <&u79 0>, <&u79 1>, <&u79 2>, <&u79 3>;
113 compatible = "iio-hwmon";
114 io-channels = <&u81 0>, <&u81 1>, <&u81 2>, <&u81 3>;
117 compatible = "iio-hwmon";
118 io-channels = <&u80 0>, <&u80 1>, <&u80 2>, <&u80 3>;
121 compatible = "iio-hwmon";
122 io-channels = <&u84 0>, <&u84 1>, <&u84 2>, <&u84 3>;
125 compatible = "iio-hwmon";
126 io-channels = <&u16 0>, <&u16 1>, <&u16 2>, <&u16 3>;
129 compatible = "iio-hwmon";
130 io-channels = <&u65 0>, <&u65 1>, <&u65 2>, <&u65 3>;
133 compatible = "iio-hwmon";
134 io-channels = <&u74 0>, <&u74 1>, <&u74 2>, <&u74 3>;
137 compatible = "iio-hwmon";
138 io-channels = <&u75 0>, <&u75 1>, <&u75 2>, <&u75 3>;
184 phy-handle = <&phy0>;
185 phy-mode = "rgmii-id";
186 phy0: ethernet-phy@c {
188 ti,rx-internal-delay = <0x8>;
189 ti,tx-internal-delay = <0xa>;
190 ti,fifo-depth = <0x1>;
191 ti,dp83867-rxctrl-strap-quirk;
205 clock-frequency = <400000>;
207 tca6416_u97: gpio@20 {
208 compatible = "ti,tca6416";
210 gpio-controller; /* interrupt not connected */
215 * 0 - SFP_SI5328_INT_ALM
216 * 1 - HDMI_SI5328_INT_ALM
217 * 5 - IIC_MUX_RESET_B
218 * 6 - GEM3_EXP_RESET_B
219 * 10 - FMC_HPC0_PRSNT_M2C_B
220 * 11 - FMC_HPC1_PRSNT_M2C_B
221 * 2-4, 7, 12-17 - not connected
225 tca6416_u61: gpio@21 {
226 compatible = "ti,tca6416";
237 * 4 - MIO26_PMU_INPUT_LS
240 * 7 - MAXIM_PMBUS_ALERT
241 * 10 - PL_DDR4_VTERM_EN
242 * 11 - PL_DDR4_VPP_2V5_EN
243 * 12 - PS_DIMM_VDDQ_TO_PSVCCO_ON
244 * 13 - PS_DIMM_SUSPEND_EN
245 * 14 - PS_DDR4_VTERM_EN
246 * 15 - PS_DDR4_VPP_2V5_EN
247 * 16 - 17 - not connected
251 i2c-mux@75 { /* u60 */
252 compatible = "nxp,pca9544";
253 #address-cells = <1>;
257 #address-cells = <1>;
261 u76: ina226@40 { /* u76 */
262 compatible = "ti,ina226";
263 #io-channel-cells = <1>;
264 label = "ina226-u76";
266 shunt-resistor = <5000>;
268 u77: ina226@41 { /* u77 */
269 compatible = "ti,ina226";
270 #io-channel-cells = <1>;
271 label = "ina226-u77";
273 shunt-resistor = <5000>;
275 u78: ina226@42 { /* u78 */
276 compatible = "ti,ina226";
277 #io-channel-cells = <1>;
278 label = "ina226-u78";
280 shunt-resistor = <5000>;
282 u87: ina226@43 { /* u87 */
283 compatible = "ti,ina226";
284 #io-channel-cells = <1>;
285 label = "ina226-u87";
287 shunt-resistor = <5000>;
289 u85: ina226@44 { /* u85 */
290 compatible = "ti,ina226";
291 #io-channel-cells = <1>;
292 label = "ina226-u85";
294 shunt-resistor = <5000>;
296 u86: ina226@45 { /* u86 */
297 compatible = "ti,ina226";
298 #io-channel-cells = <1>;
299 label = "ina226-u86";
301 shunt-resistor = <5000>;
303 u93: ina226@46 { /* u93 */
304 compatible = "ti,ina226";
305 #io-channel-cells = <1>;
306 label = "ina226-u93";
308 shunt-resistor = <5000>;
310 u88: ina226@47 { /* u88 */
311 compatible = "ti,ina226";
312 #io-channel-cells = <1>;
313 label = "ina226-u88";
315 shunt-resistor = <5000>;
317 u15: ina226@4a { /* u15 */
318 compatible = "ti,ina226";
319 #io-channel-cells = <1>;
320 label = "ina226-u15";
322 shunt-resistor = <5000>;
324 u92: ina226@4b { /* u92 */
325 compatible = "ti,ina226";
326 #io-channel-cells = <1>;
327 label = "ina226-u92";
329 shunt-resistor = <5000>;
333 #address-cells = <1>;
337 u79: ina226@40 { /* u79 */
338 compatible = "ti,ina226";
339 #io-channel-cells = <1>;
340 label = "ina226-u79";
342 shunt-resistor = <2000>;
344 u81: ina226@41 { /* u81 */
345 compatible = "ti,ina226";
346 #io-channel-cells = <1>;
347 label = "ina226-u81";
349 shunt-resistor = <5000>;
351 u80: ina226@42 { /* u80 */
352 compatible = "ti,ina226";
353 #io-channel-cells = <1>;
354 label = "ina226-u80";
356 shunt-resistor = <5000>;
358 u84: ina226@43 { /* u84 */
359 compatible = "ti,ina226";
360 #io-channel-cells = <1>;
361 label = "ina226-u84";
363 shunt-resistor = <5000>;
365 u16: ina226@44 { /* u16 */
366 compatible = "ti,ina226";
367 #io-channel-cells = <1>;
368 label = "ina226-u16";
370 shunt-resistor = <5000>;
372 u65: ina226@45 { /* u65 */
373 compatible = "ti,ina226";
374 #io-channel-cells = <1>;
375 label = "ina226-u65";
377 shunt-resistor = <5000>;
379 u74: ina226@46 { /* u74 */
380 compatible = "ti,ina226";
381 #io-channel-cells = <1>;
382 label = "ina226-u74";
384 shunt-resistor = <5000>;
386 u75: ina226@47 { /* u75 */
387 compatible = "ti,ina226";
388 #io-channel-cells = <1>;
389 label = "ina226-u75";
391 shunt-resistor = <5000>;
395 #address-cells = <1>;
398 /* MAXIM_PMBUS - 00 */
399 max15301@a { /* u46 */
400 compatible = "maxim,max15301";
403 max15303@b { /* u4 */
404 compatible = "maxim,max15303";
407 max15303@10 { /* u13 */
408 compatible = "maxim,max15303";
411 max15301@13 { /* u47 */
412 compatible = "maxim,max15301";
415 max15303@14 { /* u7 */
416 compatible = "maxim,max15303";
419 max15303@15 { /* u6 */
420 compatible = "maxim,max15303";
423 max15303@16 { /* u10 */
424 compatible = "maxim,max15303";
427 max15303@17 { /* u9 */
428 compatible = "maxim,max15303";
431 max15301@18 { /* u63 */
432 compatible = "maxim,max15301";
435 max15303@1a { /* u49 */
436 compatible = "maxim,max15303";
439 max15303@1b { /* u8 */
440 compatible = "maxim,max15303";
443 max15303@1d { /* u18 */
444 compatible = "maxim,max15303";
448 max20751@72 { /* u95 */
449 compatible = "maxim,max20751";
452 max20751@73 { /* u96 */
453 compatible = "maxim,max20751";
457 /* Bus 3 is not connected */
463 clock-frequency = <400000>;
465 /* PL i2c via PCA9306 - u45 */
466 i2c-mux@74 { /* u34 */
467 compatible = "nxp,pca9548";
468 #address-cells = <1>;
472 #address-cells = <1>;
476 * IIC_EEPROM 1kB memory which uses 256B blocks
477 * where every block has different address.
478 * 0 - 256B address 0x54
479 * 256B - 512B address 0x55
480 * 512B - 768B address 0x56
481 * 768B - 1024B address 0x57
483 eeprom: eeprom@54 { /* u23 */
484 compatible = "atmel,24c08";
489 #address-cells = <1>;
492 si5341: clock-generator@36 { /* SI5341 - u69 */
493 compatible = "si5341";
499 #address-cells = <1>;
502 si570_1: clock-generator@5d { /* USER SI570 - u42 */
504 compatible = "silabs,si570";
506 temperature-stability = <50>;
507 factory-fout = <300000000>;
508 clock-frequency = <300000000>;
509 clock-output-names = "si570_user";
513 #address-cells = <1>;
516 si570_2: clock-generator@5d { /* USER MGT SI570 - u56 */
518 compatible = "silabs,si570";
520 temperature-stability = <50>; /* copy from zc702 */
521 factory-fout = <156250000>;
522 clock-frequency = <148500000>;
523 clock-output-names = "si570_mgt";
527 #address-cells = <1>;
530 si5328: clock-generator@69 {/* SI5328 - u20 */
531 compatible = "silabs,si5328";
536 #address-cells = <1>;
538 reg = <5>; /* FAN controller */
539 temp@4c {/* lm96163 - u128 */
540 compatible = "national,lm96163";
544 /* 6 - 7 unconnected */
548 compatible = "nxp,pca9548"; /* u135 */
549 #address-cells = <1>;
554 #address-cells = <1>;
560 #address-cells = <1>;
566 #address-cells = <1>;
572 #address-cells = <1>;
578 #address-cells = <1>;
584 #address-cells = <1>;
590 #address-cells = <1>;
596 #address-cells = <1>;
608 compatible = "m25p80", "jedec,spi-nor"; /* 32MB */
609 #address-cells = <1>;
612 spi-tx-bus-width = <1>;
613 spi-rx-bus-width = <4>; /* FIXME also DUAL configuration possible */
614 spi-max-frequency = <108000000>; /* Based on DC1 spec */
615 partition@0 { /* for testing purpose */
616 label = "qspi-fsbl-uboot";
617 reg = <0x0 0x100000>;
619 partition@100000 { /* for testing purpose */
620 label = "qspi-linux";
621 reg = <0x100000 0x500000>;
623 partition@600000 { /* for testing purpose */
624 label = "qspi-device-tree";
625 reg = <0x600000 0x20000>;
627 partition@620000 { /* for testing purpose */
628 label = "qspi-rootfs";
629 reg = <0x620000 0x5E0000>;
640 /* SATA OOB timing settings */
641 ceva,p0-cominit-params = /bits/ 8 <0x18 0x40 0x18 0x28>;
642 ceva,p0-comwake-params = /bits/ 8 <0x06 0x14 0x08 0x0E>;
643 ceva,p0-burst-params = /bits/ 8 <0x13 0x08 0x4A 0x06>;
644 ceva,p0-retry-params = /bits/ 16 <0x96A4 0x3FFC>;
645 ceva,p1-cominit-params = /bits/ 8 <0x18 0x40 0x18 0x28>;
646 ceva,p1-comwake-params = /bits/ 8 <0x06 0x14 0x08 0x0E>;
647 ceva,p1-burst-params = /bits/ 8 <0x13 0x08 0x4A 0x06>;
648 ceva,p1-retry-params = /bits/ 16 <0x96A4 0x3FFC>;
649 phy-names = "sata-phy";
650 phys = <&lane3 PHY_TYPE_SATA 1 1 125000000>;
653 /* SD1 with level shifter */
657 * This property should be removed for supporting UHS mode
675 /* ULPI SMSC USB3320 */
683 snps,usb3_lpm_capable;
684 phy-names = "usb3-phy";
685 phys = <&lane2 PHY_TYPE_USB3 0 2 26000000>;