1 // SPDX-License-Identifier: GPL-2.0+
3 * dts file for Xilinx ZynqMP zc1751-xm016-dc2
5 * (C) Copyright 2015 - 2018, Xilinx, Inc.
7 * Michal Simek <michal.simek@xilinx.com>
12 #include "zynqmp.dtsi"
13 #include "zynqmp-clk-ccf.dtsi"
16 model = "ZynqMP zc1751-xm016-dc2 RevA";
17 compatible = "xlnx,zynqmp-zc1751", "xlnx,zynqmp";
34 bootargs = "earlycon";
35 stdout-path = "serial0:115200n8";
39 device_type = "memory";
40 reg = <0x0 0x0 0x0 0x80000000>, <0x8 0x00000000 0x0 0x80000000>;
52 /* fpd_dma clk 667MHz, lpd_dma 500MHz */
88 phy-mode = "rgmii-id";
91 ti,rx-internal-delay = <0x8>;
92 ti,tx-internal-delay = <0xa>;
93 ti,fifo-depth = <0x1>;
103 clock-frequency = <400000>;
105 tca6416_u26: gpio@20 {
106 compatible = "ti,tca6416";
110 /* IRQ not connected */
114 compatible = "dallas,ds1339";
124 partition@0 { /* for testing purpose */
125 label = "nand-fsbl-uboot";
126 reg = <0x0 0x0 0x400000>;
128 partition@1 { /* for testing purpose */
129 label = "nand-linux";
130 reg = <0x0 0x400000 0x1400000>;
132 partition@2 { /* for testing purpose */
133 label = "nand-device-tree";
134 reg = <0x0 0x1800000 0x400000>;
136 partition@3 { /* for testing purpose */
137 label = "nand-rootfs";
138 reg = <0x0 0x1C00000 0x1400000>;
140 partition@4 { /* for testing purpose */
141 label = "nand-bitstream";
142 reg = <0x0 0x3000000 0x400000>;
144 partition@5 { /* for testing purpose */
146 reg = <0x0 0x3400000 0xFCC00000>;
149 partition@6 { /* for testing purpose */
150 label = "nand1-fsbl-uboot";
151 reg = <0x1 0x0 0x400000>;
153 partition@7 { /* for testing purpose */
154 label = "nand1-linux";
155 reg = <0x1 0x400000 0x1400000>;
157 partition@8 { /* for testing purpose */
158 label = "nand1-device-tree";
159 reg = <0x1 0x1800000 0x400000>;
161 partition@9 { /* for testing purpose */
162 label = "nand1-rootfs";
163 reg = <0x1 0x1C00000 0x1400000>;
165 partition@10 { /* for testing purpose */
166 label = "nand1-bitstream";
167 reg = <0x1 0x3000000 0x400000>;
169 partition@11 { /* for testing purpose */
170 label = "nand1-misc";
171 reg = <0x1 0x3400000 0xFCC00000>;
182 spi0_flash0: spi0_flash0@0 {
183 compatible = "m25p80";
184 #address-cells = <1>;
186 spi-max-frequency = <50000000>;
190 label = "spi0_flash0";
191 reg = <0x0 0x100000>;
199 spi1_flash0: spi1_flash0@0 {
200 compatible = "mtd_dataflash";
201 #address-cells = <1>;
203 spi-max-frequency = <20000000>;
207 label = "spi1_flash0";
213 /* ULPI SMSC USB3320 */