2 * dts file for Xilinx ZynqMP zc1751-xm016-dc2
4 * (C) Copyright 2015, Xilinx, Inc.
6 * Michal Simek <michal.simek@xilinx.com>
8 * SPDX-License-Identifier: GPL-2.0+
13 #include "zynqmp.dtsi"
14 #include "zynqmp-clk-ccf.dtsi"
17 model = "ZynqMP zc1751-xm016-dc2 RevA";
18 compatible = "xlnx,zynqmp-zc1751", "xlnx,zynqmp";
35 bootargs = "earlycon";
36 stdout-path = "serial0:115200n8";
40 device_type = "memory";
41 reg = <0x0 0x0 0x0 0x80000000>, <0x8 0x00000000 0x0 0x80000000>;
53 /* fpd_dma clk 667MHz, lpd_dma 500MHz */
89 phy-mode = "rgmii-id";
92 ti,rx-internal-delay = <0x8>;
93 ti,tx-internal-delay = <0xa>;
94 ti,fifo-depth = <0x1>;
104 clock-frequency = <400000>;
106 tca6416_u26: gpio@20 {
107 compatible = "ti,tca6416";
111 /* IRQ not connected */
115 compatible = "dallas,ds1339";
125 partition@0 { /* for testing purpose */
126 label = "nand-fsbl-uboot";
127 reg = <0x0 0x0 0x400000>;
129 partition@1 { /* for testing purpose */
130 label = "nand-linux";
131 reg = <0x0 0x400000 0x1400000>;
133 partition@2 { /* for testing purpose */
134 label = "nand-device-tree";
135 reg = <0x0 0x1800000 0x400000>;
137 partition@3 { /* for testing purpose */
138 label = "nand-rootfs";
139 reg = <0x0 0x1C00000 0x1400000>;
141 partition@4 { /* for testing purpose */
142 label = "nand-bitstream";
143 reg = <0x0 0x3000000 0x400000>;
145 partition@5 { /* for testing purpose */
147 reg = <0x0 0x3400000 0xFCC00000>;
150 partition@6 { /* for testing purpose */
151 label = "nand1-fsbl-uboot";
152 reg = <0x1 0x0 0x400000>;
154 partition@7 { /* for testing purpose */
155 label = "nand1-linux";
156 reg = <0x1 0x400000 0x1400000>;
158 partition@8 { /* for testing purpose */
159 label = "nand1-device-tree";
160 reg = <0x1 0x1800000 0x400000>;
162 partition@9 { /* for testing purpose */
163 label = "nand1-rootfs";
164 reg = <0x1 0x1C00000 0x1400000>;
166 partition@10 { /* for testing purpose */
167 label = "nand1-bitstream";
168 reg = <0x1 0x3000000 0x400000>;
170 partition@11 { /* for testing purpose */
171 label = "nand1-misc";
172 reg = <0x1 0x3400000 0xFCC00000>;
183 spi0_flash0: spi0_flash0@0 {
184 compatible = "m25p80";
185 #address-cells = <1>;
187 spi-max-frequency = <50000000>;
191 label = "spi0_flash0";
192 reg = <0x0 0x100000>;
200 spi1_flash0: spi1_flash0@0 {
201 compatible = "mtd_dataflash";
202 #address-cells = <1>;
204 spi-max-frequency = <20000000>;
208 label = "spi1_flash0";
214 /* ULPI SMSC USB3320 */