1 // SPDX-License-Identifier: GPL-2.0+
3 * dts file for Xilinx ZynqMP Mini Configuration
5 * (C) Copyright 2015 - 2018, Xilinx, Inc.
7 * Siva Durga Prasad <siva.durga.paladugu@xilinx.com>
8 * Michal Simek <michal.simek@xilinx.com>
14 model = "ZynqMP MINI QSPI";
15 compatible = "xlnx,zynqmp";
25 stdout-path = "serial0:115200n8";
29 device_type = "memory";
30 reg = <0x0 0xfffc0000 0x40000>;
34 compatible = "arm,dcc";
40 compatible = "simple-bus";
46 compatible = "xlnx,zynqmp-qspi-1.0";
48 clock-names = "ref_clk", "pclk";
49 clocks = <&misc_clk &misc_clk>;
51 reg = <0x0 0xff0f0000 0x1000 0x0 0xc0000000 0x8000000>;
57 compatible = "fixed-clock";
59 clock-frequency = <125000000>;
67 compatible = "n25q512a11", "spi-flash";
71 spi-tx-bus-width = <1>;
72 spi-rx-bus-width = <4>;
73 spi-max-frequency = <10000000>;