2 * dts file for Xilinx ZynqMP ep108 development board
4 * (C) Copyright 2014 - 2015, Xilinx, Inc.
6 * Michal Simek <michal.simek@xilinx.com>
8 * SPDX-License-Identifier: GPL-2.0+
13 #include "zynqmp.dtsi"
14 #include "zynqmp-ep108-clk.dtsi"
17 model = "ZynqMP EP108";
31 stdout-path = "serial0:115200n8";
35 device_type = "memory";
36 reg = <0x0 0x0 0x0 0x40000000>;
47 phy-mode = "rgmii-id";
60 clock-frequency = <400000>;
62 compatible = "at,24c64";
69 clock-frequency = <400000>;
71 compatible = "at,24c64";
79 compatible = "m25p80";
83 spi-tx-bus-width = <1>;
84 spi-rx-bus-width = <4>;
85 spi-max-frequency = <10000000>;
86 partition@qspi-fsbl-uboot { /* for testing purpose */
87 label = "qspi-fsbl-uboot";
90 partition@qspi-linux { /* for testing purpose */
92 reg = <0x100000 0x500000>;
94 partition@qspi-device-tree { /* for testing purpose */
95 label = "qspi-device-tree";
96 reg = <0x600000 0x20000>;
98 partition@qspi-rootfs { /* for testing purpose */
99 label = "qspi-rootfs";
100 reg = <0x620000 0x5E0000>;
108 /* SATA Phy OOB timing settings */
109 ceva,p0-cominit-params = /bits/ 8 <0x0F 0x25 0x18 0x29>;
110 ceva,p0-comwake-params = /bits/ 8 <0x04 0x0B 0x08 0x0F>;
111 ceva,p0-burst-params = /bits/ 8 <0x0A 0x08 0x4A 0x06>;
112 ceva,p0-retry-params = /bits/ 16 <0x0216 0x7F06>;
113 ceva,p1-cominit-params = /bits/ 8 <0x0F 0x25 0x18 0x29>;
114 ceva,p1-comwake-params = /bits/ 8 <0x04 0x0B 0x08 0x0F>;
115 ceva,p1-burst-params = /bits/ 8 <0x0A 0x08 0x4A 0x06>;
116 ceva,p1-retry-params = /bits/ 16 <0x0216 0x7F06>;
131 spi0_flash0: spi0_flash0@0 {
132 compatible = "m25p80";
133 #address-cells = <1>;
135 spi-max-frequency = <50000000>;
138 spi0_flash0@00000000 {
139 label = "spi0_flash0";
140 reg = <0x0 0x100000>;
148 spi1_flash0: spi1_flash0@0 {
149 compatible = "m25p80";
150 #address-cells = <1>;
152 spi-max-frequency = <50000000>;
155 spi1_flash0@00000000 {
156 label = "spi1_flash0";
157 reg = <0x0 0x100000>;
172 dr_mode = "peripheral";
173 maximum-speed = "high-speed";
183 maximum-speed = "high-speed";
191 xlnx,max-pclock-frequency = <200000>;
195 xlnx,axi-clock-freq = <200000000>;