2 * dts file for Xilinx ZynqMP ep108 development board
4 * (C) Copyright 2014 - 2015, Xilinx, Inc.
6 * Michal Simek <michal.simek@xilinx.com>
8 * SPDX-License-Identifier: GPL-2.0+
13 #include "zynqmp.dtsi"
14 #include "zynqmp-ep108-clk.dtsi"
17 model = "ZynqMP EP108";
31 stdout-path = "serial0:115200n8";
35 device_type = "memory";
36 reg = <0x0 0x0 0x0 0x40000000>;
51 phy-mode = "rgmii-id";
64 clock-frequency = <400000>;
66 compatible = "at,24c64";
73 clock-frequency = <400000>;
75 compatible = "at,24c64";
85 partition@0 { /* for testing purpose */
86 label = "nand-fsbl-uboot";
87 reg = <0x0 0x0 0x400000>;
89 partition@1 { /* for testing purpose */
91 reg = <0x0 0x400000 0x1400000>;
93 partition@2 { /* for testing purpose */
94 label = "nand-device-tree";
95 reg = <0x0 0x1800000 0x400000>;
97 partition@3 { /* for testing purpose */
98 label = "nand-rootfs";
99 reg = <0x0 0x1C00000 0x1400000>;
101 partition@4 { /* for testing purpose */
102 label = "nand-bitstream";
103 reg = <0x0 0x3000000 0x400000>;
105 partition@5 { /* for testing purpose */
107 reg = <0x0 0x3400000 0xFCC00000>;
114 compatible = "m25p80";
115 #address-cells = <1>;
118 spi-tx-bus-width = <1>;
119 spi-rx-bus-width = <4>;
120 spi-max-frequency = <10000000>;
121 partition@qspi-fsbl-uboot { /* for testing purpose */
122 label = "qspi-fsbl-uboot";
123 reg = <0x0 0x100000>;
125 partition@qspi-linux { /* for testing purpose */
126 label = "qspi-linux";
127 reg = <0x100000 0x500000>;
129 partition@qspi-device-tree { /* for testing purpose */
130 label = "qspi-device-tree";
131 reg = <0x600000 0x20000>;
133 partition@qspi-rootfs { /* for testing purpose */
134 label = "qspi-rootfs";
135 reg = <0x620000 0x5E0000>;
143 /* SATA Phy OOB timing settings */
144 ceva,p0-cominit-params = /bits/ 8 <0x0F 0x25 0x18 0x29>;
145 ceva,p0-comwake-params = /bits/ 8 <0x04 0x0B 0x08 0x0F>;
146 ceva,p0-burst-params = /bits/ 8 <0x0A 0x08 0x4A 0x06>;
147 ceva,p0-retry-params = /bits/ 16 <0x0216 0x7F06>;
148 ceva,p1-cominit-params = /bits/ 8 <0x0F 0x25 0x18 0x29>;
149 ceva,p1-comwake-params = /bits/ 8 <0x04 0x0B 0x08 0x0F>;
150 ceva,p1-burst-params = /bits/ 8 <0x0A 0x08 0x4A 0x06>;
151 ceva,p1-retry-params = /bits/ 16 <0x0216 0x7F06>;
168 spi0_flash0: spi0_flash0@0 {
169 compatible = "m25p80";
170 #address-cells = <1>;
172 spi-max-frequency = <50000000>;
175 spi0_flash0@00000000 {
176 label = "spi0_flash0";
177 reg = <0x0 0x100000>;
185 spi1_flash0: spi1_flash0@0 {
186 compatible = "m25p80";
187 #address-cells = <1>;
189 spi-max-frequency = <50000000>;
192 spi1_flash0@00000000 {
193 label = "spi1_flash0";
194 reg = <0x0 0x100000>;
209 dr_mode = "peripheral";
210 maximum-speed = "high-speed";
220 maximum-speed = "high-speed";
228 xlnx,max-pclock-frequency = <200000>;
232 xlnx,axi-clock-freq = <200000000>;