1 // SPDX-License-Identifier: GPL-2.0
3 * dts file for Xilinx Versal a2197 RevA System Controller
5 * (C) Copyright 2019, Xilinx, Inc.
7 * Michal Simek <michal.simek@xilinx.com>
11 #include "zynqmp.dtsi"
12 #include "zynqmp-clk-ccf.dtsi"
13 #include <dt-bindings/gpio/gpio.h>
16 model = "Versal System Controller on a2197 board RevA";
17 compatible = "xlnx,zynqmp-a2197-revA", "xlnx,zynqmp-a2197", "xlnx,zynqmp";
25 bootargs = "earlycon";
26 stdout-path = "serial0:115200n8";
27 xlnx,eeprom = <&eeprom1 &eeprom0 &eeprom0>;
31 device_type = "memory";
32 reg = <0x0 0x0 0x0 0x80000000>;
36 &uart0 { /* uart0 MIO38-39 */
44 clock-frequency = <400000>;
45 i2c-mux@74 { /* this cover MGT board */
46 compatible = "nxp,pca9548";
51 /* FIXME reset connected to SYSCTRL_IIC_MUX0_RESET */
56 /* Use for storing information about SC board */
57 eeprom0: eeprom@50 { /* u96 - 24LC32A - 256B */
58 compatible = "atmel,24c32";
69 clock-frequency = <400000>;
70 i2c-mux@74 { /* This cover processor board */
71 compatible = "nxp,pca9548";
76 /* FIXME reset connected to SYSCTRL_IIC_MUX0_RESET */
81 /* Use for storing information about SC board */
82 eeprom1: eeprom@50 { /* u96 - 24LC32A - 256B */
83 compatible = "atmel,24c32";