arch/arm/dts/zynq-zybo.dts

   1 // SPDX-License-Identifier: GPL-2.0+
   2 /*
   3  *  Copyright (C) 2011 - 2015 Xilinx
   4  *  Copyright (C) 2012 National Instruments Corp.
   5  */
   6 /dts-v1/;
   7 #include "zynq-7000.dtsi"
   8
   9 / {
  10         model = "Zynq ZYBO Development Board";
  11         compatible = "digilent,zynq-zybo", "xlnx,zynq-7000";
  12
  13         aliases {
  14                 ethernet0 = &gem0;
  15                 serial0 = &uart1;
  16                 spi0 = &qspi;
  17                 mmc0 = &sdhci0;
  18         };
  19
  20         memory@0 {
  21                 device_type = "memory";
  22                 reg = <0x0 0x20000000>;
  23         };
  24
  25         chosen {
  26                 bootargs = "";
  27                 stdout-path = "serial0:115200n8";
  28         };
  29
  30         usb_phy0: phy0 {
  31                 #phy-cells = <0>;
  32                 compatible = "usb-nop-xceiv";
  33                 reset-gpios = <&gpio0 46 1>;
  34         };
  35 };
  36
  37 &clkc {
  38         ps-clk-frequency = <50000000>;
  39 };
  40
  41 &gem0 {
  42         status = "okay";
  43         phy-mode = "rgmii-id";
  44         phy-handle = <&ethernet_phy>;
  45
  46         ethernet_phy: ethernet-phy@0 {
  47                 reg = <0>;
  48                 device_type = "ethernet-phy";
  49         };
  50 };
  51
  52 &qspi {
  53         u-boot,dm-pre-reloc;
  54         status = "okay";
  55 };
  56
  57 &sdhci0 {
  58         u-boot,dm-pre-reloc;
  59         status = "okay";
  60 };
  61
  62 &uart1 {
  63         u-boot,dm-pre-reloc;
  64         status = "okay";
  65 };
  66
  67 &usb0 {
  68         status = "okay";
  69         dr_mode = "host";
  70         usb-phy = <&usb_phy0>;
  71 };