1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (C) 2011 - 2015 Xilinx
4 * Copyright (C) 2012 National Instruments Corp.
7 #include "zynq-7000.dtsi"
10 model = "Zynq ZC706 Development Board";
11 compatible = "xlnx,zynq-zc706", "xlnx,zynq-7000";
22 device_type = "memory";
23 reg = <0x0 0x40000000>;
28 stdout-path = "serial0:115200n8";
32 compatible = "usb-nop-xceiv";
38 ps-clk-frequency = <33333333>;
43 phy-mode = "rgmii-id";
44 phy-handle = <ðernet_phy>;
45 pinctrl-names = "default";
46 pinctrl-0 = <&pinctrl_gem0_default>;
48 ethernet_phy: ethernet-phy@7 {
50 device_type = "ethernet-phy";
55 pinctrl-names = "default";
56 pinctrl-0 = <&pinctrl_gpio0_default>;
61 clock-frequency = <400000>;
62 pinctrl-names = "default";
63 pinctrl-0 = <&pinctrl_i2c0_default>;
66 compatible = "nxp,pca9548";
75 si570: clock-generator@5d {
77 compatible = "silabs,si570";
78 temperature-stability = <50>;
80 factory-fout = <156250000>;
81 clock-frequency = <148500000>;
90 compatible = "adi,adv7511";
92 adi,input-depth = <8>;
93 adi,input-colorspace = "yuv422";
94 adi,input-clock = "1x";
95 adi,input-style = <3>;
96 adi,input-justification = "evenly";
101 #address-cells = <1>;
105 compatible = "atmel,24c08";
111 #address-cells = <1>;
115 compatible = "ti,tca6416";
123 #address-cells = <1>;
127 compatible = "nxp,pcf8563";
133 #address-cells = <1>;
137 compatible = "ti,ucd90120";
145 pinctrl_gem0_default: gem0-default {
147 function = "ethernet0";
148 groups = "ethernet0_0_grp";
152 groups = "ethernet0_0_grp";
158 pins = "MIO22", "MIO23", "MIO24", "MIO25", "MIO26", "MIO27";
164 pins = "MIO16", "MIO17", "MIO18", "MIO19", "MIO20", "MIO21";
171 groups = "mdio0_0_grp";
175 groups = "mdio0_0_grp";
182 pinctrl_gpio0_default: gpio0-default {
185 groups = "gpio0_7_grp", "gpio0_46_grp", "gpio0_47_grp";
189 groups = "gpio0_7_grp", "gpio0_46_grp", "gpio0_47_grp";
195 pins = "MIO46", "MIO47";
205 pinctrl_i2c0_default: i2c0-default {
207 groups = "i2c0_10_grp";
212 groups = "i2c0_10_grp";
219 pinctrl_sdhci0_default: sdhci0-default {
221 groups = "sdio0_2_grp";
226 groups = "sdio0_2_grp";
233 groups = "gpio0_14_grp";
234 function = "sdio0_cd";
238 groups = "gpio0_14_grp";
246 groups = "gpio0_15_grp";
247 function = "sdio0_wp";
251 groups = "gpio0_15_grp";
259 pinctrl_uart1_default: uart1-default {
261 groups = "uart1_10_grp";
266 groups = "uart1_10_grp";
282 pinctrl_usb0_default: usb0-default {
284 groups = "usb0_0_grp";
289 groups = "usb0_0_grp";
295 pins = "MIO29", "MIO31", "MIO36";
300 pins = "MIO28", "MIO30", "MIO32", "MIO33", "MIO34",
301 "MIO35", "MIO37", "MIO38", "MIO39";
315 pinctrl-names = "default";
316 pinctrl-0 = <&pinctrl_sdhci0_default>;
322 pinctrl-names = "default";
323 pinctrl-0 = <&pinctrl_uart1_default>;
329 usb-phy = <&usb_phy0>;
330 pinctrl-names = "default";
331 pinctrl-0 = <&pinctrl_usb0_default>;