arch/arm/dts/zynq-zc706.dts

   1 /*
   2  * Xilinx ZC706 board DTS
   3  *
   4  *  Copyright (C) 2011 - 2015 Xilinx
   5  *  Copyright (C) 2012 National Instruments Corp.
   6  *
   7  * SPDX-License-Identifier:     GPL-2.0+
   8  */
   9 /dts-v1/;
  10 #include "zynq-7000.dtsi"
  11
  12 / {
  13         model = "Zynq ZC706 Development Board";
  14         compatible = "xlnx,zynq-zc706", "xlnx,zynq-7000";
  15
  16         aliases {
  17                 ethernet0 = &gem0;
  18                 i2c0 = &i2c0;
  19                 serial0 = &uart1;
  20                 spi0 = &qspi;
  21                 mmc0 = &sdhci0;
  22         };
  23
  24         memory@0 {
  25                 device_type = "memory";
  26                 reg = <0x0 0x40000000>;
  27         };
  28
  29         chosen {
  30                 bootargs = "";
  31                 stdout-path = "serial0:115200n8";
  32         };
  33
  34         usb_phy0: phy0 {
  35                 compatible = "usb-nop-xceiv";
  36                 #phy-cells = <0>;
  37         };
  38 };
  39
  40 &clkc {
  41         ps-clk-frequency = <33333333>;
  42 };
  43
  44 &gem0 {
  45         status = "okay";
  46         phy-mode = "rgmii-id";
  47         phy-handle = <&ethernet_phy>;
  48         pinctrl-names = "default";
  49         pinctrl-0 = <&pinctrl_gem0_default>;
  50
  51         ethernet_phy: ethernet-phy@7 {
  52                 reg = <7>;
  53                 device_type = "ethernet-phy";
  54         };
  55 };
  56
  57 &gpio0 {
  58         pinctrl-names = "default";
  59         pinctrl-0 = <&pinctrl_gpio0_default>;
  60 };
  61
  62 &i2c0 {
  63         status = "okay";
  64         clock-frequency = <400000>;
  65         pinctrl-names = "default";
  66         pinctrl-0 = <&pinctrl_i2c0_default>;
  67
  68         i2cswitch@74 {
  69                 compatible = "nxp,pca9548";
  70                 #address-cells = <1>;
  71                 #size-cells = <0>;
  72                 reg = <0x74>;
  73
  74                 i2c@0 {
  75                         #address-cells = <1>;
  76                         #size-cells = <0>;
  77                         reg = <0>;
  78                         si570: clock-generator@5d {
  79                                 #clock-cells = <0>;
  80                                 compatible = "silabs,si570";
  81                                 temperature-stability = <50>;
  82                                 reg = <0x5d>;
  83                                 factory-fout = <156250000>;
  84                                 clock-frequency = <148500000>;
  85                         };
  86                 };
  87
  88                 i2c@1 {
  89                         #address-cells = <1>;
  90                         #size-cells = <0>;
  91                         reg = <1>;
  92                         adv7511: hdmi-tx@39 {
  93                                 compatible = "adi,adv7511";
  94                                 reg = <0x39>;
  95                                 adi,input-depth = <8>;
  96                                 adi,input-colorspace = "yuv422";
  97                                 adi,input-clock = "1x";
  98                                 adi,input-style = <3>;
  99                                 adi,input-justification = "evenly";
 100                         };
 101                 };
 102
 103                 i2c@2 {
 104                         #address-cells = <1>;
 105                         #size-cells = <0>;
 106                         reg = <2>;
 107                         eeprom@54 {
 108                                 compatible = "at,24c08";
 109                                 reg = <0x54>;
 110                         };
 111                 };
 112
 113                 i2c@3 {
 114                         #address-cells = <1>;
 115                         #size-cells = <0>;
 116                         reg = <3>;
 117                         gpio@21 {
 118                                 compatible = "ti,tca6416";
 119                                 reg = <0x21>;
 120                                 gpio-controller;
 121                                 #gpio-cells = <2>;
 122                         };
 123                 };
 124
 125                 i2c@4 {
 126                         #address-cells = <1>;
 127                         #size-cells = <0>;
 128                         reg = <4>;
 129                         rtc@51 {
 130                                 compatible = "nxp,pcf8563";
 131                                 reg = <0x51>;
 132                         };
 133                 };
 134
 135                 i2c@7 {
 136                         #address-cells = <1>;
 137                         #size-cells = <0>;
 138                         reg = <7>;
 139                         ucd90120@65 {
 140                                 compatible = "ti,ucd90120";
 141                                 reg = <0x65>;
 142                         };
 143                 };
 144         };
 145 };
 146
 147 &pinctrl0 {
 148         pinctrl_gem0_default: gem0-default {
 149                 mux {
 150                         function = "ethernet0";
 151                         groups = "ethernet0_0_grp";
 152                 };
 153
 154                 conf {
 155                         groups = "ethernet0_0_grp";
 156                         slew-rate = <0>;
 157                         io-standard = <4>;
 158                 };
 159
 160                 conf-rx {
 161                         pins = "MIO22", "MIO23", "MIO24", "MIO25", "MIO26", "MIO27";
 162                         bias-high-impedance;
 163                         low-power-disable;
 164                 };
 165
 166                 conf-tx {
 167                         pins = "MIO16", "MIO17", "MIO18", "MIO19", "MIO20", "MIO21";
 168                         low-power-enable;
 169                         bias-disable;
 170                 };
 171
 172                 mux-mdio {
 173                         function = "mdio0";
 174                         groups = "mdio0_0_grp";
 175                 };
 176
 177                 conf-mdio {
 178                         groups = "mdio0_0_grp";
 179                         slew-rate = <0>;
 180                         io-standard = <1>;
 181                         bias-disable;
 182                 };
 183         };
 184
 185         pinctrl_gpio0_default: gpio0-default {
 186                 mux {
 187                         function = "gpio0";
 188                         groups = "gpio0_7_grp", "gpio0_46_grp", "gpio0_47_grp";
 189                 };
 190
 191                 conf {
 192                         groups = "gpio0_7_grp", "gpio0_46_grp", "gpio0_47_grp";
 193                         slew-rate = <0>;
 194                         io-standard = <1>;
 195                 };
 196
 197                 conf-pull-up {
 198                         pins = "MIO46", "MIO47";
 199                         bias-pull-up;
 200                 };
 201
 202                 conf-pull-none {
 203                         pins = "MIO7";
 204                         bias-disable;
 205                 };
 206         };
 207
 208         pinctrl_i2c0_default: i2c0-default {
 209                 mux {
 210                         groups = "i2c0_10_grp";
 211                         function = "i2c0";
 212                 };
 213
 214                 conf {
 215                         groups = "i2c0_10_grp";
 216                         bias-pull-up;
 217                         slew-rate = <0>;
 218                         io-standard = <1>;
 219                 };
 220         };
 221
 222         pinctrl_sdhci0_default: sdhci0-default {
 223                 mux {
 224                         groups = "sdio0_2_grp";
 225                         function = "sdio0";
 226                 };
 227
 228                 conf {
 229                         groups = "sdio0_2_grp";
 230                         slew-rate = <0>;
 231                         io-standard = <1>;
 232                         bias-disable;
 233                 };
 234
 235                 mux-cd {
 236                         groups = "gpio0_14_grp";
 237                         function = "sdio0_cd";
 238                 };
 239
 240                 conf-cd {
 241                         groups = "gpio0_14_grp";
 242                         bias-high-impedance;
 243                         bias-pull-up;
 244                         slew-rate = <0>;
 245                         io-standard = <1>;
 246                 };
 247
 248                 mux-wp {
 249                         groups = "gpio0_15_grp";
 250                         function = "sdio0_wp";
 251                 };
 252
 253                 conf-wp {
 254                         groups = "gpio0_15_grp";
 255                         bias-high-impedance;
 256                         bias-pull-up;
 257                         slew-rate = <0>;
 258                         io-standard = <1>;
 259                 };
 260         };
 261
 262         pinctrl_uart1_default: uart1-default {
 263                 mux {
 264                         groups = "uart1_10_grp";
 265                         function = "uart1";
 266                 };
 267
 268                 conf {
 269                         groups = "uart1_10_grp";
 270                         slew-rate = <0>;
 271                         io-standard = <1>;
 272                 };
 273
 274                 conf-rx {
 275                         pins = "MIO49";
 276                         bias-high-impedance;
 277                 };
 278
 279                 conf-tx {
 280                         pins = "MIO48";
 281                         bias-disable;
 282                 };
 283         };
 284
 285         pinctrl_usb0_default: usb0-default {
 286                 mux {
 287                         groups = "usb0_0_grp";
 288                         function = "usb0";
 289                 };
 290
 291                 conf {
 292                         groups = "usb0_0_grp";
 293                         slew-rate = <0>;
 294                         io-standard = <1>;
 295                 };
 296
 297                 conf-rx {
 298                         pins = "MIO29", "MIO31", "MIO36";
 299                         bias-high-impedance;
 300                 };
 301
 302                 conf-tx {
 303                         pins = "MIO28", "MIO30", "MIO32", "MIO33", "MIO34",
 304                                "MIO35", "MIO37", "MIO38", "MIO39";
 305                         bias-disable;
 306                 };
 307         };
 308 };
 309
 310 &qspi {
 311         u-boot,dm-pre-reloc;
 312         status = "okay";
 313 };
 314
 315 &sdhci0 {
 316         u-boot,dm-pre-reloc;
 317         status = "okay";
 318         pinctrl-names = "default";
 319         pinctrl-0 = <&pinctrl_sdhci0_default>;
 320 };
 321
 322 &uart1 {
 323         u-boot,dm-pre-reloc;
 324         status = "okay";
 325         pinctrl-names = "default";
 326         pinctrl-0 = <&pinctrl_uart1_default>;
 327 };
 328
 329 &usb0 {
 330         status = "okay";
 331         dr_mode = "host";
 332         usb-phy = <&usb_phy0>;
 333         pinctrl-names = "default";
 334         pinctrl-0 = <&pinctrl_usb0_default>;
 335 };